Figure 19-14 Lcd Controller Timing Diagram (Self-Refresh Mode); Table 19-15 Lcd Controller Timing Parameters - Motorola MC68VZ328 User Manual

Motorola mc68vz328 integrated processor user's manual
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AC Electrical Characteristics
LFLM
LLP
LD[7:0]
LREF
LCLK
Figure 19-14. LCD Controller Timing Diagram (Self-Refresh Mode)
Number
1
Line pulse to frame signal
2
Line pulse width
3
LCLK to data valid
4
Shift clock to line pulse
Note:
The preceding data is measured by summing the polarity bits LFLM, LLP, and LCLK in the POLCF register.
The variable pixclk = LCD_CLK / (pcd + 1).
The self-refresh mode timing between LFRM, LSCLK, LD, and LLP are the same as in normal mode.
The self-refresh mode is entered and exited on the positive edge of LFRM.
In self-refresh mode, the LFRM and LLP waveforms are identical to the waveforms in normal mode, while LD and
LCLK remain in inactive level.
19-18
Self-Refresh Mode
Table 19-15. LCD Controller Timing Parameters
Characteristic
MC68VZ328 User's Manual
(3.0 ± 0.3) V
Minimum
Maximum
(4 * pixclk) - 2
(4 * pixclk) - 2
-2
2
(2 * pixclk) - 2
(2 * pixclk) + 2
Unit
ns
ns
ns
ns

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