Chip-Select Read Cycle Timing; Figure 19-1 Clko Reference To Chip-Select Signals Timing Diagram; Table 19-3 Clko Reference To Chip-Select Signals Timing Parameters - Motorola MC68VZ328 User Manual

CLKO
CSx
RASx
CASx
Figure 19-1. CLKO Reference to Chip-Select Signals Timing Diagram
Table 19-3. CLKO Reference to Chip-Select Signals Timing Parameters
Number
1 CLKO high to CSx asserted
2 CLKO low to CSx negated
3 CLKO high to RASx asserted
4 CLKO high to RASx negated
5 CLKO high to CASx asserted
6 CLKO high to CASx negated
19.3.2

Chip-Select Read Cycle Timing

Figure 19-2 on page 19-4 shows the read cycle timing used by chip-select. The signal values and units of
measure for this figure are found in Table 19-4 on page 19-4. For detailed information about the individual
signals, see Chapter 6, "Chip-Select Logic."
S2 S4
S0
1
3
5
Characteristic
Electrical Characteristics
AC Electrical Characteristics
WS S6 S0
4
6
(3.0 ± 0.3) V
Minimum Maximum
— 10
— 12
— 10
— 12
— 10
— 12
2
Unit
ns
ns
ns
ns
ns
ns
19-3