Motorola MC68VZ328 User Manual page 299

Motorola mc68vz328 integrated processor user's manual
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Table 16-3. ICE Control Mask Register Description (Continued)
Name
Description
RWM
Read or Write Cycle Mask—This
Bit 1
bit masks the RW bit of the
ICEMCCR.
PDM
Program or Data Cycle
Bit 0
Mask—This bit masks the PD bit
of the ICEMCCR.
0 = Enable the comparator to compare itself against the RW bit.
1 = Force a true comparison ("don't care") on the corresponding
bit.
0 = Enable the comparator to compare itself against the PD bit.
1 = Force a true comparison ("don't care") on the corresponding
bit.
In-Circuit Emulation
Programming Model
Setting
16-7

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