Queue Status Signal Timing - Motorola HC12 Refrence Manual

To reconstruct the queue, the information carried by the status signals must be cap-
tured externally. In general, data movement and execution start information are con-
sidered to be distinct 2-bit values, with the low-order bit on IPIPE0 and the high-order
bit on IPIPE1. Data movement information is available on rising edges of the E clock;
execution start information is available on falling edges of the E clock, as shown in
ure 8-1. Data movement information refers to data on the bus at the previous falling
edge of E. Execution information refers to the bus cycle from the current falling edge
to the next falling edge of E.
IPIPE[1:0] pins.
ECLK
ADDR
DATA
IPIPE[1:0]
Data Movement
(capture at E rise)
0:0
0:1
1:0
1:1
Execution Start
(capture at E fall)
0:0
0:1
1:0
1:1
MOTOROLA
8-2
Table 8-1
EX1 REFERS TO THIS CYCLE
EX1 DM0
DM0 REFERS TO DATA CAPTURED
ON THIS ECLK TRANSITION
Figure 8-1 Queue Status Signal Timing
Table 8-1 IPIPE[1:0] Decoding
Mnemonic
—
LAT
ALD
ALL
Mnemonic
—
INT
SEV
SOD
DEVELOPMENT AND DEBUG SUPPORT
summarizes the information encoded on the
EX2 DM1 EX3
Latch data from bus
Advance queue and load from bus
Advance queue and load from latch
Start interrupt sequence
Start even instruction
Start odd instruction
Fig-
QUE STATUS TIM
Meaning
No movement
Meaning
No start
CPU12
REFERENCE MANUAL