Uart 2 Non-Integer Prescaler Register; Table 14-15 Uart 2 Non-Integer Prescaler Register Description - Motorola MC68VZ328 User Manual

Programming Model
14.4.13

UART 2 Non-Integer Prescaler Register

The UART 2 non-integer prescaler register (NIPR2) contains the control bits for the non-integer prescaler.
The bit position assignments for this register are shown in the following register display. The settings for
this register are described in Table 14-15.
NIPR2
BIT 15 14
PRE
SEL
TYPE rw
0 0
RESET
Table 14-15. UART 2 Non-Integer Prescaler Register Description
Name
PRESEL Prescaler Selection—This bit selects the
Bit 15 input to the baud rate generator divider.
Refer to Figure 14-4 on page 14-7 for infor-
mation about selecting the prescaler.
Reserved Reserved
Bits 14–11
SELECT Tap Selection—This field selects a tap from
Bits 10–8 the non-integer divider.
STEP Step Value—This field selects the non-inte-
VALUE ger prescaler's step value.
Bits 7–0
14-28
UART 2 Non-Integer Prescaler Register
13 12 11 10
SELECT
rw rw
0 0 0 0
Description
MC68VZ328 User's Manual
9 8 7 6 5
rw rw rw rw
0 0 0 0 0
0x0000
0 = Divider source is from the integer prescaler.
1 = Divider source is from the non-integer prescaler.
These bits are reserved and should be set to 0.
000 = Divide range is 2 to 3 127/128 in 1/128 steps.
001 = Divide range is 4 to 7 63/64 in 1/64 steps.
010 = Divide range is 8 to 15 31/32 in 1/32 steps.
011 = Divide range is 16 to 31 15/16 in 1/16 steps.
100 = Divide range is 32 to 63 7/8 in 1/8 steps.
101 = Divide range is 64 to 127 3/4 in 1/4 steps.
110 = Divide range is 128 to 255 1/2 in 1/2 steps.
111 = Disable the non-integer prescaler.
0000 0000. Step = 0.
0000 0001. Step = 1.
.
.
.
1111 1110. Step = 254.
1111 1111. Step = 255.
0x(FF)FFF91A
4 3 2 1 BIT 0
STEP VALUE
rw rw rw rw rw
0 0 0 0
Setting
0