Host Interface; Dedicated Debug Monitor Memory; Figure 16-2 Typical Emulator Design Example - Motorola MC68VZ328 User Manual

Select/Control
Address
Comparator
FPGA for
More
Hardware
Breakpoint
Expansion
(Optional)
D[15:0]
Target Board
16.3.1

Host Interface

The host interface can be a processor-based or state-machine-based circuit that is used to coordinate the
activities between the emulation processor and the PC host. The interface can be an RS-232 or printer
parallel I/O. The interface runs on the PC, and it will translate its requests to low-level commands and send
them to the emulator's controller if there is one.
16.3.2

Dedicated Debug Monitor Memory

When a breakpoint is matched, the CPU must report its status and grab the necessary contents, such as
internal registers, in the system. This information is then transmitted to the host control processor to be
translated before it is passed to the interface on the PC. The monitor program is located in ROM at
0xFFFC0000–0xFFFCFFFF and is enabled or disabled by the EMUCS signal.
MOCLK
BUSW
CSxx
EMUBRK
A[23:0]
MC68VZ328
CPU
EMUIRQ
CSxx
3.3 V / 5 V Buffer
D[15:0]
Figure 16-2. Typical Emulator Design Example
In-Circuit Emulation
Typical Design Programming Example
Host
Control
Select/control
EMUCS
CS
CS
MAP
FPGA
DTACK
P/D
Optional
CLKO
Trace
Module
Solder-on
Emulator Pod
Footprint
PC
Debug
ROM
Emulation
Memory
4M Maximum
(Optional)
D[15:0]
16-11