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Table 6-10. Chip-Select Register D Description (Continued)
Name
FLASH
Flash Memory Support—When enabled,
Bit 8
this bit provides support for flash memory by
forcing the LWE/UWE signal to go active after
chip-select.
Note:
This bit is used for expanded memory
size for CSD when the DRAM bit is enabled.
BSW
Data Bus Width—This bit sets the data bus
Bit 7
width for this chip-select area.
WS3–1
Wait State—This field contains the 3 most
Bits 6–4
significant bits of the 4-bit wait-state value.
The least significant bit is located in the
chip-select control register 1. The value of
these 4 bits determines the number of wait
states added to a bus cycle before an internal
DTACK is asserted to terminate the
chip-select cycle.
SIZ
Chip-Select Size—This field determines the
Bits 3–1
memory range of the chip-select. For CSAx
and CSBx, the chip-select size is between
128K and 16 Mbyte. For CSCx and CSDx, the
chip-select size is between 32K and
16 Mbyte.
EN
Chip-Select Enable—This write-only bit
Bit 0
enables each chip-select.
Description
Chip-Select Logic
Setting
0 = The chip-select and LWE/UWE signals go active
at the same clock edge.
1 = The chip-select signal goes low 1 clock before
LWE/UWE.
0 = 8 bit.
1 = 16 bit.
000 = 0 + WS0 wait states.
001 = 2 + WS0 wait states.
010 = 4 + WS0 wait states.
011 = 6 + WS0 wait states.
100 = 8 + WS0 wait states.
101 = 10 + WS0 wait states.
110 = 12 + WS0 wait states.
111 = External DTACK.
When using the external DTACK signal, you must
select DTACK function in Port G.
WS0 is the DWS0, CWS0, BWS0, or AWS0 bit in
the CSCTRL1 register.
000 = 128K (32K or 8 Mbyte* for CSCx and CSDx).
001 = 256K (64K or 16 Mbyte* for CSCx and CSDx).
010 = 512K (128K for CSCx and CSDx).
011 = 1 Mbyte (256K for CSCx and CSDx).
100 = 2 Mbyte (512K for CSCx and CSDx).
101 = 4 Mbyte (1 Mbyte for CSCx and CSDx).
110 = 8 Mbyte (2 Mbyte for CSCx and CSDx).
111 = 16 Mbyte (4 Mbyte for CSCx and CSDx).
* Note: Large DRAM size selection requires the
DSIZ3 bit in the chip-select control register to be set.
0 = Disabled.
1 = Enabled.
Programming Model
6-15
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