Figure 7-1 Dram Controller Block Diagram - Motorola MC68VZ328 User Manual

Introduction to the DRAM Controller
CLK32
SYSCLK
Address
Data
Control
CSD0
CSD1
Page Access
(from LCD)
8-Bit Port
(from SIM)
A[31:1]
7-2
Mode
Control
Refresh
Control
DTACK
Control
DRAM Address
Control
Figure 7-1. DRAM Controller Block Diagram
MC68VZ328 User's Manual
RAS0
DRAM
RAS1
Signal
CAS0
Control
CAS1
MD[15:0]