Condition Code Register (Ps: Ccr); Fig. 2.20 Configuration Of Condition Code Register (Ccr) - Fujitsu MB90420/5 (A) Series Hardware Manual

MB90420/5 (A) SERIES F

2.7.4 Condition Code Register (PS: CCR)

The condition code register (PS: CCR) is an 8-bit register consisting of bits indicating the operation result
and the transfer data, and the bits controlling acceptance of the interrupt request.
n Configuration of condition code register (CCR)
Figure 2.20 shows the configuration of the CCR register. Refer to the Programming Manual for the CCR
state at instruction execution.
ILM
bit 15 bit 14 bit 13 bit 12 bit 11 bit 10
ILM2 ILM1 ILM0 B4
PS
— : Not used
X : Undefined
• Interrupt enable flag (I)
When the I flag is 1, the interrupt is enabled for all interrupt requests other than a software interrupt. When
the I flag is 0, the interrupt is disabled. This flag is cleared by a reset.
• Stack flag (S)
This flag indicates the pointer used for the stack operation. When the S flag is 0, the user stack pointer
(USP) is enabled. When the S flag is 1, the system stack pointer (SSP) is enabled. This flag is set at an
interrupt acceptance or at a reset.
• Sticky-bit flag (T)
This flag is set to 1 when data shifted out by a carry contains at least one 1 at execution of the logical shift
to right instruction or the arithmetical shift to right instruction. Otherwise, this flag is set to 0. This flag is
also set to 0 when the shift amount is zero.
• Negative flag (N)
This flag is set to 1 when the MSB of the operation result is 1. This flag is cleared to 0 when the MSB of
the operation result is 0.
• Zero flag (Z)
This flag is set to 1 when the bits of the operation result are all 0s. Otherwise, this flag is cleared to 0.
• Overflow flag (V)
This flag is set to 1 when an overflow occurs as a signed numerical value at operation execution.
Otherwise, this flag is cleared to 0.
• Carry flag (C)
This flag is set to 1 when a carrying up from the MSB or a carry down to the MSB occurs at operation
execution. Otherwise, this flag is cleared to 0.
2
MC-16LX FAMILY 16-BIT MICROCONTROLLERS HARDWARE MANUAL
RP
bit 9 bit 8
B3 B2 B1 B0
Interrupt enable flag
Stack flag
Sticky-bit flag
Negative flag
Zero flag
Overflow flag
Carry flag

Fig. 2.20 Configuration of Condition Code Register (CCR)

CCR
bit 7 bit 6 bit 5 bit 4
— I S T
— 0 1 X
2-22
bit 43 bit 2 bit 1 bit 0
N Z V C
X X X X
Initial value
of CCR
–01XXXXX
B