Time-Base Timer Control Register (Tbtc); Fig. 9.3 Time-Base Timer Control Register (Tbtc) - Fujitsu MB90420/5 (A) Series Hardware Manual

F2mc-16lx family 16-bit microcontrollers
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MB90420/5 (A) SERIES F

9.3.2 Time-base Timer Control Register (TBTC)

The time-base timer control register (TBTC) can control interrupts by the time-base timer and clears the time-
base counter.
n Time-base timer control register (TBTC)
Time-base timer contol register
Address: 0000A9
Read/write →
Initial value →
Note:
Access by read-modify family instructions causes a malfunction, so do not access by these
instructions.
[bit 15] Reserved
Bit 15 is a reserved bit. Always set 1 to this bit.
[bit 12] TBIE
TBIE enables interval interrupts by the time-base timer. When TBIE is 1, interrupts are enabled; when
TBIE is 0 interrupts are disabled. TBIE is initialized to 0 by a reset. TBIE can be both read and written.
[bit 11] TBOF
TBOF is the interrupt request flag for the time-base timer. An interrupt request is issued when TBOF is
set to 1 when the TBIE bit is 1. TBOF is set to 1 at the interval set by the TBC1 and 0 bits. TBOF is
cleared by writing 0 to TBOF, transitions to the stop mode, transitions from the sub-clock mode to the
main-clock mode, transitions from the main clock mode to the PLL clock mode, or by reset. Writing 1 to
TBOF has no meaning.
1 is read at reading TBOF by a read-modify-write family instruction.
[bit 10] TBR
TBR clears all bits of the time-base timer counter to 0. Writing 0 to TBR clears the time-base counter.
Writing 1 to TBR has no meaning. 1 is read from TBR at reading.
Note:
Clear TBOF when the interrupt by the time-base timer is masked by the TBIE bit or by the ILM bit of
the CPU.
[bits 9, 8] TBC1, 0
TBC1 and 0 set the time-base timer interval.
Resets initialize these bits to 00. These bits can be both read and written.
TBC1
TBC0
0
0
0
1
1
0
1
1
2
MC-16LX FAMILY 16-BIT MICROCONTROLLERS HARDWARE MANUAL
15
14
Reserved
H
(—)
(—)
(1)
(—)

Fig. 9.3 Time-base Timer Control Register (TBTC)

Table 9-3 Interval Time and Cycle Count of TBC1 and 0
Interval Time when Original
Oscillation is 4 MHz
1.024 ms
4.096 ms
16.384 ms
131.072 ms
13
12
11
TBIE
TBOF
(—)
(R/W)
(R/W)
(—)
(0)
(0)
Cycle Count of Oscillation Clock
(Original Oscillation)
9-8
10
9
8
TBR
TBC1
TBC0
(W)
(R/W)
(R/W)
(1)
(0)
(0)
12
2
cycle
14
2
cycle
16
2
cycle
19
2
cycle
← Bit No.
TBTC

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