Fig. 6.5 Hardware Interrupt Request During Writing To The Resource Control Register Area; Table 6-8 Hardware Interrupt Inhibit Instructions - Fujitsu MB90420/5 (A) Series Hardware Manual

MB90420/5 (A) SERIES F
n Hardware interrupt inhibition
No hardware interrupt requests are accepted under following conditions.
• Hardware interrupt inhibition during writing to resource control register areas
No hardware interrupt requests are accepted during writing to resource control register areas.
prevents the CPU from malfunctioning at interrupt processing when an interrupt is requested during
rewriting related to interrupt control registers in each resource. The resource control register area is not
the I/O addressing area at 000000
in the resource control register.
Figure 6.5 shows the hardware interrupt operation during writing to the resource control register area.
• • • •

Fig. 6.5 Hardware Interrupt Request during Writing to the Resource Control Register Area

• Hardware interrupt inhibition by interrupt inhibit instruction
The ten hardware interrupt inhibit instructions shown in Table 6-8 do not detect the existence of hardware
interrupt request and they ignore the hardware interrupt request. When a valid hardware interrupt request
is issued during execution of these instructions, interrupt handling is performed for the interrupt request
only after the first different types of instruction is executed.
Instruction that does not accept
interrupts and hold requests
• Hardware interrupt inhibition during software interrupt handling
When the software interrupt is started, the I flag is cleared to 0, so other interrupt requests are not
accepted.
2
MC-16LX FAMILY 16-BIT MICROCONTROLLERS HARDWARE MANUAL
to 0000FF
H
Instruction for write to resource control register area
MOV A, #08 MOV io, A
Interrupt request
issued here

Table 6-8 Hardware Interrupt Inhibit Instructions

Prefix Code
PCB
DTB
ADB
SPB
CMR
NCC
, but is the area allocated to the control and data registers
H
MOV A, 2000
No branch to
interrupt
Interrupt/Hold Inhibit Instruction
(instruction to delay effects of prefix code)
MOV ILM, #imm8
OR CCR, #imm8
AND CCR, #imm8
POPW PS
6-14
Interrupt
H
handling
Branch to
interrupt
This