Cpu - Fujitsu MB90420/5 (A) Series Hardware Manual

F2mc-16lx family 16-bit microcontrollers
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This chapter explains the memory space.

2.1 CPU

2
The F
MC-16LX CPU core is a 16-bit CPU designed for uses such as civilian equipment's and on-vehicle
equipment's requiring high-speed and real-time processing. The F
designed for controllers and capable of processing various controls at high speed and high efficiency. The
2
CPU core of the F
MC-16LX integrates an internal 32-bit accumulator, so it can process both 32-bit and 16-
bit data. The memory space is maximum 16 Mbytes and can be accessed by either the linear or bank type.
The instruction system has been also improved on the basis of the F
level language conformed instructions, extending addressing modes, enhancing the instructions of
multiplication and division and by enriching bit processing. The features of the F
follows.
n CPU
• Minimum instruction execution time: 62.5 ns (when operation performed at 4 MHz oscillation, 4-multiplied)
• Maximum memory space: 16 Mbytes. This is accessed in the linear/bank type.
• Instruction system optimized for controller
Various data types: Bit, byte, word, and longword
Extended addressing mode: 23 types
Enhanced high-precision operation (32-bit long) by using 32-bit accumulator
Signed multiplication/division and extended RETI instruction
• Powerful interrupt function:
Eight priority levels (programmable)
• CPU-independent auto transfer function:
Expansion intelligent I/O service up to 16 channels
• Instruction system supporting high-level language (C language), multitasking
Adoption of system stack pointer, symmetrical instruction set, and barrel shift instruction
• Improved execution speed: 4-byte queue
Note:
Since only single-chip mode is used for the MB90420/5 (A) series, access is limited only to internal
ROM space, internal RAM space, and internal resource space.
CPU
2
MC-16LX CPU's instruction sets are
2
MC-8L A-T architecture by adding high-
2-3
2
MC-16LX CPU are as

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