Fujitsu MB90420/5 (A) Series Hardware Manual page 141

6.4.1 Operation of Hardware Interrupt
The operation from the issuance of hardware interrupt request to the completion of interrupt handling is
explained below.
n Start of hardware interrupt
• Operation of resource (interrupt request issuance)
The resource with a hardware interrupt request function has an interrupt request flag indicating whether an
interrupt request is issued or not and an interrupt enable flag selecting whether an interrupt request to the
CPU is enabled or disabled. The interrupt request flag is set when events inherent in the resource occur.
When the interrupt enable flag is enabled, an interrupt request is issued to the interrupt controller.
• Operation of interrupt controller (control of interrupt request)
The interrupt controller compares the interrupt levels (IL) simultaneously received each other to select the
highest-level request (the lowest value of the IL), and then notifies the result to the CPU. If there are plural
requests of the same level, smaller interrupt number is preferred.
• Operation of CPU (interrupt request acceptance and interrupt handling)
The CPU compares the received interrupt level (ICR: IL2 to IL0) and the interrupt level mask register
(ILM), and starts the interrupt handling microcode after termination of the currently executing instruction
when IL < ILM and the interrupt is enabled (PS: CCR: I = 1). The CPU refers the ISE bit of the interrupt
control register (ICR) at the beginning of the interrupt handling microcode, and continues the interrupt
handling when ISE = 0 (EI
At interrupt handling, the values of the dedicated registers (A, DPR, ADB, DTB, PCB, PC and PS: total 12
bytes) are saved in the system stack (system stack space indicated by SSB and SSP) first. Then, the
interrupt vectors are loaded to the program counters (PCB, PC), ILM is updated, and the stack flag (S) is
set (CCR: S = 1, validating the system stack).
n Return from hardware interrupt
When the resource interrupt request flag that became the interrupt factor is cleared and the RETI instruction
is executed during the interrupt processing program, the 12-byte data saved in the system stack is returned
to the dedicated registers and control is returned to the processing executed before the interrupt branch.
When the interrupt request flag is cleared, the interrupt request output to the interrupt controller by the
resource is cancelled automatically.
INTERRUPT
2
OS is started when ISE = 1).
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