Ei Os Handling Time - Fujitsu MB90420/5 (A) Series Hardware Manual

2
6.6.5 EI OS Handling Time
The time required for EI
• Setting of EI
2
OS status register (ISCS)
• Address (area) indicated by I/O register address pointer (IOA)
• Address (area) indicated by buffer address pointer (BAP)
• External data bus width at external access
• Transfer data length
Since the hardware interrupt is started at termination of data transfer by EI
added.
2
n EI
OS handling time (time for one transfer)
• At continuing data transfer
2
The EI OS handling time at continuing data transfer is determined by the setting of the EI
register (ISCS) and is shown in Table 6-11.
2
Setting of EI OS Termination Control Bit (SE)
Setting of IOA Updating/Fixing Selection Bit (IF)
Setting of BAP address updating/fixing
selection bit (BF)
Unit: Machine cycle (one machine cycle is equal to one cycle of the machine clock (φ).)
In addition, compensation is required depending on the conditions at EI
12.
Table 6-12 Compensation Value for Data Transfer at EI
I/O Register Address Pointer
Buffer address pointer
B : Byte data transfer
8 : Word transfer in 8-bit external bus width
Even : Word transfer at even address
Odd : Word transfer at odd address
2
OS handling depends on the following factors.
Table 6-11 EI
Fixed
Updated
Internal access
External access
INTERRUPT
2
OS Executing Time
Termination by Termination
Request from Resource
Fixed Updated
32
34
Internal Access
B/even
B/even 0
Odd +2
B/even +1
8/odd +4
6-31
2
OS, the interrupt handling time is
Ignores Termination
Request from Resource
Fixed
34 33
36 35
2
OS executing as shown in Table 6-
2
OS Processing Time
External Access
Odd B/even
+2 +1
+4 +3
+3 +2
+6 +5
2
OS status
Updated
35
37
8/odd
+4
+6
+5
+8