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20.2.4 Decrement Grade Register
The decrement grade register stores the reload value for the decrement counter. They are prepared to
automatically decrement the stored value in the amplitude data register.
n Decrement Grade Register
Decrement grade register
Address: 00005E
H
Read/write →
Initial value →
When the DEC bit is "1" and the decrement counter counts the count of tone pulses up to the reload value,
the stored value in the amplitude data register is decremented by 1(one) at the end of the tone cycle.
This operation realizes automatic de-gradation of the sound with fewer number of times of CPU
interventions.
It should be noted that the count of the tone pulses specified by this register equals to "register value +1".
When the decrement grade register is set to "00", the decrement operation is performed every tone cycle.
20.2.5 Tone Count Register
The tone count register stores the reload value for the tone pulse counter. The tone pulse counter
accumulate the count of tone pulses (or number of times of decrement operations) and when it reaches the
reload value it sets the INT bit. They are intended to reduce the frequency of interrupts.
n Tone Count Register
Tone count register
Address: 00005F
H
Read/write →
Initial value →
The count input of the Tone Pulse counter is connected to the carry-out signal from the Decrement counter.
And when the tone count register is set to "00", the tone pulse counter sets the INT bit every carry-out from
the decrement counter. Thus the count of accumulated tone pulses is;
((Decrement grade register) +1) x ((Tone count register) +1)
i.e. When the both registers are set to "00", the INT bit is set every tone cycle.
SOUND GENERATOR
7
6
5
D7
D6
D5
(R/W)
(R/W)
(R/W)
(X)
(X)
(X)
15
14
13
D7
D6
D5
(R/W)
(R/W)
(R/W)
(X)
(X)
(X)
20-9
4
3
2
D4
D3
D2
(R/W)
(R/W)
(R/W)
(X)
(X)
(X)
12
11
10
D4
D3
D2
(R/W)
(R/W)
(R/W)
(X)
(X)
(X)
← Bit No.
1
0
D1
D0
SGDR
(R/W)
(R/W)
(X)
(X)
← Bit No.
9
8
D1
D0
SGTR
(R/W)
(R/W)
(X)
(X)
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