Block Diagram Of Input Capture; Fig. 11.1 Block Diagram - Fujitsu MB90420/5 (A) Series Hardware Manual

MB90420/5 (A) SERIES F

11.2 Block Diagram of Input Capture

The block diagram of input capture is given below.
n Block diagram
IVF IVFE STOP
16-bit free-run timer
Capture data register 0/2
Capture data register 1/3
2
MC-16LX FAMILY 16-BIT MICROCONTROLLERS HARDWARE MANUAL
Interrupt
#31 (1F )
H
MODE
SCLR CLK2 CLK1 CLK0
16-bit compare clear register

Fig. 11.1 Block Diagram

Compare circuit
MSI3 to 0
EG11 EG10
ICP0 ICP1
11-4
φ
Divider
Clock
Interrupt
#33 (21
ICLR ICRE
A/D start
Edge detection
EG01 EG00
Edge detection
ICE0 ICE1
Interrupt
#19, #23
#15, #21
)
H
IN0/2
IN1/3