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12.7.2 Operation in Synchronous Mode (Operation Mode 2)
When the UART is used in operation mode 2 (normal mode), the transfer mode is clock synchronous.
n Operation in synchronous mode (operation mode 2)
• Format of transfer data
In the synchronous mode, 8-bit data is transferred on an LSB-first, and the start and stop bits are not
attached. Figure 12.16 shows the data format for the clock synchronous mode.
Writing transmit data
Transmit/receive clock
RXE, TXE
Transmit/receive data
• Clock supply
In the clock synchronous mode (I/O expansion serial), count of clocks equal to the transmit and receive
bits count must be supplied.
– When the internal clock (dedicated baud rate generator or internal timer) is already selected and data is
transmitted, the synchronous clock for data reception is generated automatically.
– When the external clock is already selected, the clock for exactly one byte must be supplied from
outside after ensuring that data is present (SSR0/1: TDRE = 0) in the output data register (SODR0/1)
of the transmit UART. Also, before and after transmitting, always set the mark level to the H level.
• Error detection
Only overrun errors can be detected; parity and framing errors cannot be detected.
• Initialization
The setting value of each control register for the synchronous mode is shown.
[Mode register (SMR0/1)]
MD1, MD0
: 10
CS2, CS1, CS0
: Specifies clock input of clock selector
SCKE:
1 : Dedicated baud rate generator or internal timer
0 : Clock output or external clock (clock input)
SOE:
1 : At transmission
0 : At reception
1
LSB
Fig. 12.16 Format of Transfer Data (operation mode 2)
B
UART
0
1
1
0
0
Data
12-31
Mark level
1
0
MSB
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