Table 10-5 Function Of Each Bit Of Timer Control Status Register (Upper) (Tmcsr0, Tmcsr1: H) - Fujitsu MB90420/5 (A) Series Hardware Manual

MB90420/5 (A) SERIES F

Table 10-5 Function of Each Bit of Timer Control Status Register (upper) (TMCSR0, TMCSR1: H)

Bit Name
bit 15 Unused bits
bit 14
bit 13
bit 12
bit 11 CSL1, CSL0:
bit 10
Count clock select bits
bit 9 MOD2, MOD1, MOD0:
bit 8
Operating mode select
bit 7
bits
2
MC-16LX FAMILY 16-BIT MICROCONTROLLERS HARDWARE MANUAL
• Values at reading are undefined.
• Writing to these bits does not affect operation.
• These bits select the count clock.
• When these bits are not 11
internal clock.
• When these bits are 11
of the external clock.
<In internal clock mode >
• The MOD2 bit selects the function of the input pin.
• When the MOD2 bit is 0, the input pin serves as the trigger input pin. When an
effective edge is input, the value of the reload register is loaded into the
counter to continue counting. MOD1 and 0 bits select the type of the effective
edge.
• When the MOD2 bit is 1, the input pin serves as the gate input pin, and
counting is performed during input of the effective level. The MOD1 bit is an
unused bit and the MOD0 bit selects the effective level.
<In event count mode enabled>
• The MOD2 is an unused but. Set any value (0 or 1) for the MOD2 bit.
• The input pin is used as the trigger input pin for the event input, and the
MOD1 and MOD0 bits select the effective edge.
10-10
Function
, the internal clock mode is enabled to count the
B
, the event count mode is enabled to count the edge
B