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MB90420/5 (A) SERIES F
25.4 Flash Memory Control Status Register (FMCS)
The control status register (FMCS) with the flash memory interface circuit, is used at programming to/erasing
from flash memory.
n Control status register (FMCS)
Bit No.
Address: 0000AE
H
Read/write →
Initial value →
• Explanation of each bit
[bit 7] INTE (INTerrupt Enable)
This bit generates an interrupt to the CPU at the end of programming to/erasing from flash memory.
When both the INTE and RDYINT bits are 1s, an interrupt to the CPU is generated. When the INTE bit is
0, no interrupt is generated.
0: Interrupt disabled at end of programming and erasing
1: Interrupt enabled at end of programming and erasing
[bit 6] RDYINT (ReaDY INTerrupt)
This bit indicates the operation state of flash memory.
After completion of programming to/erasing from flash memory, this bit becomes 1. While this bit is 0,
programming to/erasing from flash memory is impossible. Programming to/erasing from flash memory is
possible only when this bit becomes 1. Writing 0 clears this bit to 0 and writing 1 is ignored. This bit is set
to 1 at the end timing of the automatic algorithm in flash memory (see the Flash Memory Automatic
Algorithm). 1 is always read when the read-modify-write (RMW) instruction is used.
0: Programming and erasing
1: Programming and erasing terminated (interrupt request issued)
[bit 5] WE (Write Enable)
This bit enables writing to the flash memory area.
When this bit is 1, data is programmed to a flash memory area after issuing a command sequence (see
the Flash Memory Automatic Algorithm) to the FE to FF banks. When this bit is 0, no program/erase
signals are generated. This bit is used to start the command for programming to/erasing from flash
memory.
This bit should be always set to 0 when not programming/erasing data to/from flash memory.
0: Programming to and erasing from flash memory disabled
1: Programming to and erasing from flash memory enabled
[bit 4] RDY (ReadDY)
This bit enables programming to and erasing from flash memory. While this bit is 0, programming
to/erasing from flash memory is disabled. However, the read/reset command and sector erase halt
command are accepted even under this condition.
0: Programming and erasing
1: Programming and erasing terminated (programming and erasing of next data enabled)
[bit 3, 1] Reserved bit
This bit is reserved for testing. It should always be set to 0 in normal use.
2
MC-16LX FAMILY 16-BIT MICROCONTROLLERS HARDWARE MANUAL
7
6
5
INTE
WE
RDYINT
(R/W)
(R/W)
(R/W)
(0)
(0)
(0)
4
3
2
RDY
LPM1
Reserved
(R)
(W)
(W)
(1)
(0)
(0)
25-8
1
0
LPM0
Reserved
(W)
(R/W)
(0)
(0)
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