Motherboard Implementation; Valid Codec Configurations; Spkr Pin Configuration; Table 88. Supported Codec Configurations - Intel 855GM Design Manual

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11.3.2.

Motherboard Implementation

The following design considerations are provided for the implementation of an ICH4-M platform using
AC'97. These design guidelines have been developed to ensure maximum flexibility for board
designers, while reducing the risk of board-related issues. These recommendations are not the only
implementation or a complete checklist, but they are based on the ICH4-M platform.
• Active components such as FET switches, buffers or logic states should not be implemented on the
AC-link signals, except for AC_RST#. Doing so would potentially interfere with timing margins
and signal integrity.
• The ICH4-M supports wake-on-ring from S1M-S5 states via the AC'97 link. The codec asserts
AC_SDIN to wake the system. To provide wake capability and/or caller ID, standby power must be
provided to the modem codec. If no codec is attached to the link, internal pull-downs will prevent
the inputs from floating, so external resistors are not required.
• PC_BEEP should be routed through the audio codec. Care should be taken to avoid the introduction
of a pop when powering the mixer up or down.
11.3.2.1.

Valid Codec Configurations

Table 88. Supported Codec Configurations

Option
1
2
3
4
5
6
NOTES:
1. For power management reasons, codec power management registers are in audio space. As a result, if there is
an audio codec in the system it must be Primary.
2. There cannot be two modems in a system since there is only one set of modem DMA channels.
3. The ICH4-M supports a codec on any of the AC_SDIN lines, however the modem codec ID must be either 00 or
01.
11.3.3.

SPKR Pin Configuration

SPKR is used as both the output signal to the system speaker and as a functional strap. The strap
function enables or disables the "TCO Timer Reboot function" based on the state of the SPKR pin on
the rising edge of PWROK. When enabled, the ICH4-M sends an SMI# to the processor upon a TCO
timer timeout. The status of this strap is readable via the NO_REBOOT bit (bit 1, D31: F0, Offset D4h).
The SPKR signal has a weak integrated pull-down resistor (the resistor is only enabled during
boot/reset). Therefore, its default state is a logical zero or set to reboot. To disable the feature, a jumper
can be populated to pull the signal line high (see Figure 99). The value of the pull-up must be such that
the voltage divider output caused by the pull-up, the effective pull-down (R
integrated pull-down resistor will be read as logic high (0.5 * VCC3_3 to VCC3_3 + 0.5 V).
®
Intel 855GM/855GME Chipset Platform Design Guide
Primary Codec Secondary Codec
Audio Audio
Audio Audio
Audio Audio
Audio Modem
Audio Audio/Modem
Audio/Modem Audio
I/O Subsystem
Tertiary Codec Notes
Audio 1
Modem 1
Audio/Modem 1
Audio 1
Audio 1
Audio 1
), and the ICH4-M's
eff
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