Table C-5 Pin Status in Single Chip Mode
Pin name
Function
P20 to P27
Port
P30 to P37
P40 to P47
P50 to P57
P60 to P67
P70
EOP0
P80
Port
P81
P82
P83
P84
P85
PA0
PA1 to
PA2
PA3
EOP1
PA4 to
Port
PA5
PA6
PB0
PB1
PB2
PB3
PB4
EOP2
During sleep
HIZX=0
Previous status
Previous status
retained
retained
P: Previous
status retained
F: EOP output
Previous status
retained
P: Previous
status retained
F: EOP output
Previous status
retained
P: Previous
status retained
F: EOP output
APPENDIX C Pin Status for Each CPU Status
During stop
HIZX=1
Output Hi-Z/
Input fixed to 0
—
Reset time
Output Hi-Z/
Input
allowed for
all pins
393