Table 15.4-3 Specification Of Transfer End Output - Fujitsu MB91F109 FR30 Hardware Manual

Fr30 series 32-bit microcontroller
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[bit 16, 8, 0] EPDEn
These bits specifies the time when the transfer end output signal is to be generated from the
corresponding output pin and also specify whether to enable the output function of the
corresponding transfer end output signal pin.

Table 15.4-3 Specification of Transfer End Output

EPSEn
EPDEn
0
0
0
1
1
0
1
1
These bits are initialized to "00" by resetting.
The bits can be both read and written.
Operation control function
Disables transfer end output.
Enables transfer end output. Transfer end is output when
transfer destination data is accessed.
Transfer completion output enabled; output when accessing
the transfer source data access
Enables transfer end output. Transfer end is output when
transfer source and destination data is accessed.
15.4 DMAC Pin Control Register (DATCR)
331

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