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16.5 Flash Memory Access Modes
The following two types of access mode are available for the FR-CPU:
• ROM mode: One word (32 bits) can be read in one cycle, but not written.
• Programming mode: Access to data with a length in words (32 bits) is inhibited but
writing data with a length in half-words (16 bits) is enabled.
FR-CPU ROM Mode (32 Bits, Read only)
In this mode, the flash memory serves as FR-CPU internal ROM. This mode enables to read
one word (32 bits) in one cycle but does not enable to write to flash memory or to start the
automatic algorithm.
Mode specification
When specifying this mode, set the "WE" bit of the flash memory status register to "0".
This mode is always set after a reset occurs at CPU run time.
This mode can be set only when the CPU is running.
Detailed operation
In this mode, one word (32 bits) can be read from the flash memory area in one cycle.
Depending on the read operation, two cycles may be required per word (when 1 wait cycle is
included), thereby making it possible to issue instructions to the FR-CPU with no wait.
Restrictions
Address assignment and endians in this mode differ from those for writing with the ROM writer.
In this mode, commands and data cannot be written to flash memory together.
FR-CPU Programming Mode (16 Bits, Read/Write)
This mode enables data to be written and erased. As one word (32 bits) cannot be accessed in
one cycle, program execution in flash memory is disabled in this mode.
Mode specification
When specifying this mode, set the "WE" bit of the flash memory status register to "1".
When a reset occurs at CPU run time, the "WE" bit indicates "0". When setting this mode, set
the "WE" bit to "1". If the "WE" bit is set again to "0" through a writing operation or because of a
reset, the device enters ROM mode.
When the "RDY" bit of the flash memory status register is "0", the "WE" bit cannot be
overwritten. When overwriting the "WE" bit, ensure that the "RDY" bit is set to "1".
Detailed operation
One half-word (16 bits) can be read from the flash memory area in one cycle.
Depending on the read operation, two cycles can be required for reading a half-word (when 1
wait cycle is included).
The automatic algorithm can be started by writing a command to flash memory.
When the automatic algorithm starts, data can be written to or erased from flash memory.
16.5 Flash Memory Access Modes
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