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CHAPTER 15 DMAC
Transfer Stop in Continuous Transfer Mode (When Both Addresses are Changed) for 16-Bit or 8-Bit
Data
Transfer source area: external, transfer destination area: external
CLK
DREQn
Addr pin
Data pin
RDXD
WRnX
DACK
EOP
Transfer source area: external, transfer destination area: internal RAM
CLK
DREQn
Addr pin
Data pin
RDXD
WRnX
DACK
EOP
Transfer source area: internal RAM, transfer destination area: external
CLK
DREQn
Addr pin
Data pin
RDXD
WRnX
DACK
EOP
348
D
S
D
S
W
S
S
S
S
D
D
D
D
D
D
W
W
W
D
#0H
#1H
D
#0H
#1H
W
W
W
#0H
#1H
#0H
#1H
W
W
#0H
#1H
#1L
#0H
#1H
#1L
W
W
W
#1L
#2L
#2H
#1L
#2H
#2L
W
W
W
#1L
#2H
#2L
#1L
#2H
#2L
W
W
W
#2H
#2L
#2H
#2L
W
W
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