Figure 4.16-9 External Bus Access For 8-Bit Bus Width - Fujitsu MB91F109 FR30 Hardware Manual

8-bit bus width

Figure 4.16-9 External Bus Access for 8-bit Bus Width

(A) Word access
(a) PA1/PA0= '00'
1)Output A1/A0 = '00'
2)Output A1/A0 = '01'
3)Output A1/A0 = '10'
4)Output A1/A0 = '11'
MSB LSB
00
01
10
11
8bit
(B) Half-word access
(a) PA1/PA0= '00'
1)Output A1/A0 = '00'
2)Output A1/A0 = '01'
00
01
10
11
(C) Byte access
(a) PA1/PA0= '00'
1)Output A1/A0 = '00'
00
01
10
11
PA1/PA0 : Lower 2 bits of address specified by program
Output A1/A0 : Lower 2 bits of output address
: First byte location of output address
: Data byte location for access
1) to 4) : Bus access count
4.16 Relationship between Data Bus Widths and Control Signals
(b) PA1/PA0= '01'
1)Output A1/A0 = '00'
2)Output A1/A0 = '01'
3)Output A1/A0 = '10'
4)Output A1/A0 = '11'
00
01
10
11
(b) PA1/PA0= '01'
1)Output A1/A0 = '00'
2)Output A1/A0 = '01'
00
01
10
11
(b) PA1/PA0= '01'
1)Output A1/A0 = '01'
00
01
10
11
(c) PA1/PA0= '10'
1)Output A1/A0 = '00'
2)Output A1/A0 = '01'
3)Output A1/A0 = '10'
4)Output A1/A0 = '11'
00
01
10
11
(c) PA1/PA0= '10'
1)Output A1/A0 = '10'
2)Output A1/A0 = '11'
00
01
10
11
(c) PA1/PA0= '10'
1)Output A1/A0 = '10'
00
01
10
11
(d) PA1/PA0= '11'
1)Output A1/A0 = '00'
2)Output A1/A0 = '01'
3)Output A1/A0 = '10'
4)Output A1/A0 = '11'
00
01
10
11
(d) PA1/PA0= '11'
1)Output A1/A0 = '10'
2)Output A1/A0 = '11'
00
01
10
11
(d) PA1/PA0= '11'
1)Output A1/A0 = '11'
00
01
10
11
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