Fujitsu MB91F109 FR30 Hardware Manual page 146

CHAPTER 4 BUS INTERFACE
<Note>
Before writing to the MODR, set the bus width, equal to that set by the MD2, MD1, and MD0
pins, in BW1 and BW0 of AMD0.
The bus width of area 0 is specified by the MD2, MD1, and MD0 pins at reset time. After setting
the mode register (MODR), the bus width set in AMD0 becomes valid.
CS0 bus width
Suppose that the width of area 0 is set to 16 bits by the MD2, MD1, and MD0 pins, and wiring to
the MODR is performed without setting AM0 with the bus width left as is. As the initial value of
BW1 and BW0 of AMD0 is "00", the bus width changes to 8 bits, thereby causing an error.
122
RSTX (reset)
MD2, MD1, and MD0 pins
MODR write
AMD0 register