Reference Manual
MICROPROCESSOR AND SYSTEM CONTROL
SYSTEM CONTROL
Control of the datapaths within the ADRV9001 is done through the API or ENABLE pin controls. For API control, this is reliant on the
SPI communication bus and thus, for critical time alignment of powering on/off chains, pin control is recommended for TDD applications.
Independently control each datapath with the following enable signals:
Table 30. Datapath Enable Signals
Enable Signal
RX1_ENABLE
RX2_ENABLE
TX1_ENABLE
TX2_ENABLE
For ADRV9001 to receive and react to control signals, move it to the primed state. The primed state indicates that the system is ready for
operation when the transmit and receive channels are enabled. After the channel is primed, and to start transmit or reception activities, further
transition it from the primed state to the RF_ENABLED state, either in PIN mode by the enable signals listed in
commands.
PIN Mode
1. Call adi_adrv9001_Radio_ChannelEnableMode_Set( ) to set the PIN mode.
2. Toggle corresponding ENABLE pin to transition the channel between PRIMED state and RF_ENABLED state.
SPI Mode
1. Call adi_adrv9001_Radio_ChannelEnableMode_Set( ) to set the SPI mode.
2. Call adi_adrv9001_Radio_Channel_EnableRf( ) to transition the channel between PRIMED state.
After pin or SPI/API mode is executed, the ADRV9001 enables the requested channels. The channels remain active until further instruction
through a pin command or SPI/API command.
TIMING PARAMETERS CONTROL
The ADRV9001 has integrated stream processors to handle various external and internal events. These events must be serviced in real
time. These stream processors coupled with programmable delayed enable modules relieve the system firmware (running on integrated
microprocessor) from managing all the critical events with a quick and parallel response to external and internal events. This configuration
allows the 4-channels (Tx1, Tx2, Rx1, and Rx2) to operate independently from each other by using their own dedicated stream processor.
The ADRV9001 can support different applications, each with its own unique challenges. A set of programmable timing parameters for both
transmitter and receiver meet the particular timing requirements in various TDD applications. It is crucial to understand the ADRV9001 timing
parameters to ensure all TDD events take place at an accurate time order. In addition, configuring timing parameters in an optimal way,
by taking advantage of the multiple power saving modes of the ADRV9001, improves the overall system power consumption performance
significantly.
Timing Definition
Before explaining the typical values for each delay, this chapter attempts to visualize and explain each delay and how it pertains to the physical
component.
Figure 65
is a visual representation of the most pertinent delays in a system. Note that the length of each arrow does not represent
the length of each delay in time. These are just representations of each delay in terms of the hardware.
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Datapath
Rx1 datapath
Rx2 datapath
Tx1 datapath
Tx2 datapath
ADRV9001
Table 30
or in SPI mode by API
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