Analog Devices ADRV9001 User Manual page 11

Reference Manual
ADRV9001 EXAMPLE USE CASES
Table 1. Constraints and Limitations in a Single-Band 2T2R FDD Type Small-Cell Application (Continued)
Functionality Constraints and Limitations
Transmitter Signal Path Ensure an appropriate level of isolation between Tx1 and Tx2 as well as receiver to transmitter at the system level.
LO Generation In FDD type small-cell applications, the ADRV9001 can use its internal LO to generate RF LO1 for uplink (Rx1 and Rx2) and RF LO2 for downlink
(Tx1 and Tx2). It is also possible to use external LO inputs in this mode of operation.
RF Front End For LO generation, the ADRV9001 uses internal VCO that generates square wave type signal. A square wave LO produces harmonics. For
example, depending on RF matching used on the RF ports, the second LO harmonic can be as high as −50 dBc, and the third harmonic can be
as high as −9 dBc. Therefore, the RF filtering on the receiver and transmitter path must ensure that signals at the LO harmonic frequencies (up to
ninth in some cases) do not affect overall system performance.
DPD The DPD functionality is not available when the ADRV9001 operates in the 2T2R FDD mode.
Calibrations During the receiver initialization sequence, ensure that there are no signals present at the receiver input (external low noise amplifier (LNA)
must be disabled), and appropriate termination must be present at the LNA output to avoid reflections of receiver calibration tones. During the
transmitter initialization sequence, ensure that the power amplifier is powered down to avoid unwanted emission of transmitter calibration tones at
the antenna. No transmitter tracking calibrations are available when the ADRV9001 operates in the 2T2R FDD mode.
AGPIOs Analog GPIOs (operating at 1.8 V level) can be used as read or write digital levels in the end user system. AGPIOs can be used to control states
of external components or read back digital logic levels from external components.
DGPIOs Digital GPIOs can be used to perform real-time monitoring of states of internal ADRV9001 blocks. Digital GPIOs operating as inputs can control
receiver gain, transmitter attenuation, AGC operation, and other elements of the ADRV9001 transceiver. Depending on the ADRV9001 operation,
up to 4 GPIOs may be used by the data port interface.
AuxADC AuxADC can be used to monitor analog voltage (for example, a temperature sensor). The maximum AuxADC input voltage must not exceed 0.95
V.
AuxDAC AuxDAC can be used to control the VCXO responsible for generating the ADRV9001 device clock and control any circuitry that requires analog
control voltage up to 1.75 V.
DEV_CLK_OUT The ADRV9001 provides a divided down version of the DEV_CLK reference clock input signal on the DEV_CLK_OUT output. This output is
intended to provide reference clock signal to the digital components in the overall system. This output can be configured to be active after
power-up and before the ADRV9001 configuration stage.
Multichip Sync If there is no need for multichip synchronization (MCS), initialize the ADRV9001 using API functions only.
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