Enhanced Rx Ssi Mode; Power Saving For Lssi - Analog Devices ADRV9001 User Manual

Reference Manual
DATA INTERFACE
Receive LSSI with Two, Four, and Eight Times Data Clock Rates
The ADRV9001 receive LSSI supports the two, four, or eight times of the data clock rate for some applications, which is similar with the receiver
CSSI mode (see the timing diagrams in the

ENHANCED RX SSI MODE

The Rx SSI LVDS two-lane and CMOS one-lane modes have two enhanced modes to support 22-bit and 15-bit data samples in the I/Q mode.
For the 22-bit data samples, the 32bit interface data bus has the following fields:
22 -bit of data sample (I/Q from Rx datapath: unrounded data samples: RxDataPathI/Q[21:0])
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1-bit = 0 (Constant)
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1-bit Gain Change (Slicer or Index Gain Change flag)
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8-bit Gain (Slicer or Index Gain)
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It produces the following Interface data with a 32-bit data format for the CMOS and LVDS SSI:
LVDS 32-bit: 2 lanes (I and Q) of 32-bit each
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LSSI_DATA_I/Q [31:0] = {RxDataPathI/Q[21:0], b0, Gain_Change, Gain [7:0]}
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CMOS 64-bit: 1 Lane (I and Q)
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CSSI_DATA [63:0] = {RxDataPathI[21:0], b0, Gain_Change, Gain[7:0], RxDataPathQ[21:0], b0, Gain_Change, Gain[7:0] }
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For the 15-bit data samples, the 16-bit interface data bus has the following fields:
15-bit of data sample (15-bit I/Q rounded from 22-bit Rx datapath samples)
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1-bit Gain Change (Slicer or Index Gain Change flag)
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It produces the following interface data with 16-bit data format for the CMOS and LVDS SSI:
LVDS 16-bit: 2 lanes (I and Q) of 16-bit each
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LSSI_DATA_I/Q [15:0] = {RxDataPathI/Q rounded[14:0], Gain_Change}
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CMOS 32-bit: 1 Lane (I and Q)
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CSSI_DATA [31:0] = {RxDataPathI rounded[14:0], Gain_Change, RxDataPathQ rounded[14:0], Gain_Change}
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Some other basic configuration modes, such as MSB/LSB first option, I or Q first option (for CMOS one-lane), and the Long/Short strobe option
are similar to the previous SSI LVDS/CMOS 16-bit operations.

POWER SAVING FOR LSSI

In the time division duplex (TDD) mode, the LVDS SSI pads can be powered down/up dynamically based on the Tx_Enable and Rx_Enable
level to save power. Three LSSI power-down modes are defined for different requirements
Down_Set is used to set the power-down mode for a specified channel.
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Figure 56. Transmit LSSI Timing for 16-Bit I/Q Data Sample Sharing One-Lane
Receive CSSI with Two, Four, and Eight Times Data Clock Rates
ADRV9001
section).
(Table 24). The API adi_adrv9001_Ssi_Power-
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