Analog Devices ADRV9001 User Manual page 29

Reference Manual
ADRV9001 EXAMPLE USE CASES
external DSA in the receiver signal chains. For time-critical TDD type applications, the ADRV9001 transceiver can be controlled by toggling
control lines. The ADRV9001 can control external receiver/transmitter switch using its analog GPIOs as well as provide power amplifier bias
voltage using AuxDAC outputs. Multichip Sync signal together with DEV_CLK can be used to synchronize multiple ADRV9001 in the end
system.
Table 10. Constraints and Limitations in a Radar Type Application
Functionality Constraints and Limitations
Receiver Signal Path Ensure an appropriate level of isolation between Rx1 and Rx2 as well as receiver to transmitter at the system level. In the example, RxB input is
used during transmitter observation. The LNA connected to the Rx1A must be powered down during transmitter slots to ensure proper operation
of the transmitter observation path (connected to the Rx1B). Ensure that an appropriate attenuation is present in line to prevent the receiver input
being overloaded by the transmitter signal.
LO Generation In a Radar type application, the ADRV9001 can use its internal LO to generate RF LO1 for both uplink and downlink. For applications with
stringent RF LO requirements, use external LO inputs.
RF Front End For LO generation, the ADRV9001 uses internal VCO that generates square wave type signal. A square wave LO produces harmonics. For
example, depending on RF matching used on the RF ports, the second LO harmonic can be as high as −50 dBc, and the third harmonic can be
as high as −9 dBc. Therefore, the RF filtering on the receiver and transmitter path must ensure that signals at the LO harmonic frequencies (up to
ninth in some cases) do not affect overall system performance.
DPD The DPD functionality can be used in the 2T2R TDD mode. The DPD operation can be performed by the ADRV9001 or ORx data can be sent
to the baseband processor through the receiver data port during transmitter operation. The receiver path used during DPD operation to perform
the transmitter observation is also used by the transmitter tracking calibrations. In case of external DPD, ensure that access to the receiver path
during transmitter slots is time-shared between the DPD operation and transmitter calibrations.
Calibrations During the receiver initialization sequence, ensure that there are no signals present at the receiver input (external LNA must be disabled), and
appropriate termination must be present at the LNA output to avoid reflections of the receiver calibration tones. During the transmitter initialization
sequence, ensure that the power amplifier is powered down to avoid unwanted emission of the transmitter calibration tones at the antenna.
The ADRV9001 must access the receiver datapath during transmitter time slots to operate the transmitter tracking calibration. If a user uses DPD
in its system, then access to the receiver datapath during transmitter slots must be time-shared between the DPD operation and Tx calibrations.
AGPIOs Analog GPIOs (operating at 1.8 V level) can be used as read or write digital levels of in the end user system. AGPIOs can be used to control the
states of external components (for example, RF Switch) or read back digital logic levels from the external components.
DGPIOs Digital GPIOs can be used to perform real-time monitoring of the states of internal ADRV9001 blocks. Digital GPIOs operating as inputs control the
receiver gain, transmitter attenuation, AGC operation, and other elements of the ADRV9001 transceiver. Depending on the ADRV9001 operation,
up to 4 GPIOs may be used by the data port interface.
AuxADC AuxADC can be used to monitor analog voltage (for example, a temperature sensor). The maximum AuxADC input voltage must not exceed 0.95
V.
AuxDAC AuxDAC can be used to: control VCXO responsible for generating device clock, generate a preconfigured ramp up/down signal that can be used
to control power amplifier bias, or control any circuitry that requires analog control voltage up to 1.75 V.
DEV_CLK_OUT The ADRV9001 provides a divided down version of the DEV_CLK reference clock input signal on the DEV_CLK_OUT output. This output is
intended to provide reference clock signal to the digital components in the overall system. This output can be configured to be active after power
up and before the ADRV9001 configuration stage.
Multichip Sync The ADRV9001 allows to synchronize multiple transceivers used in a single system. The ADRV9001 provides the capability to accept an external
reference clock and synchronize operation with other devices using simple control logic. Logical pulses applied at MCS input align each device's
data clock with a common reference. Preserve the relationship of MCS pulse to the DEV_CLK edge at the ADRV9001 pins. For correct operation,
it is critical to match the length of PCB traces that carry the DEV_CLK and MCS signals to each ADRV9001 device.
analog.com
ADRV9001
Rev. 0 | 29 of 351