Analog Devices ADRV9001 User Manual page 277

Reference Manual ADRV9001
PRINTED CIRCUIT BOARD LAYOUT RECOMMENDATIONS
Figure 260. Transmitter Matching Network on ADRV9001 Evaluation Board
Transmitter Bias and Port Interface
This section considers the DC biasing of the ADRV9001 transmitter outputs and how to interface to each transmitter port. At full output power,
each differential output side draws approximately 100 mA of DC bias current. The transmitter outputs are DC biased to a 1.8 V supply voltage
using either RF chokes (wire-wound inductors) or a transformer (balun) center tap connection.
Careful design of the DC bias network ensures optimal RF performance levels. When designing the DC bias network, select components with
low DC resistance (RDCR) to minimize the voltage drop across the series parasitic resistance element with either of the DC bias schemes
suggested in Figure 261 and Figure 262. The red resistors (R_DCR) indicate the parasitic elements. As the impedance of the parasitic
elements increases, the voltage drop (ΔV) across the parasitic element increases, which causes the transmitter RF performance (such as
PO,1dB, PO,MAX) to degrade. Select the choke inductance (L_c) high enough relative to the load impedance such that it does not degrade
the output power. If using chokes, they should be very well matched (including PCB traces). Uneven matching of chokes design can cause
unwanted emission of spikes at the transmitter output. This emission can affect components connected to the transmitter output.
The recommended DC bias network uses the center tap balun, as shown in Figure 262. This network has fewer parasitic elements and fewer
total components.
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