Reference Manual
ADRV9001 EVALUATION SYSTEM
3. The FPGA board toggles the GPIO pins to set the hop table index according to the loaded sequence. Select the GPIO pins used in the
"GPIO Pins for Control of Hop Table" section.
4. The "Executed Sequence" table automatically updates with the gain and attenuation settings as indicated by the sequence table loaded in
step 2.
5. Per Example 1, when the users program the part and click Play in the Receive tab, they are shown the "Frequency Hopping" window and
can commit frames to the receiver or transmitter. In this example, notice that the signal is attenuated at the rate described in the gain and
attenuation tables.
Example 3: Automated TDD with Frequency Hopping
Unlike the previous mode, in this mode, specify the TDD timing. Also, there is no frequency hopping window to advance frames manually.
Instead the frames are played automatically.
To achieve this:
1. Follow the steps in Example 2 before programming.
2. In the Automated TDD tab, click Enable Automated TDD State Machine for FPGA.
3. The ADRV9001 TES includes several predefined examples in the /Examples folder.
analog.com
Figure 341. GPIO Pins for Control of Hop Table
Figure 342. Executed Sequence Table (GPIO Settings)
ADRV9001
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