Analog Devices ADRV9001 User Manual page 238

Reference Manual
GENERAL-PURPOSE INPUT/OUTPUT (GPIO) AND INTERRUPT CONFIGURATION
Table 98. Summary of Digital GPIO Output Features (Continued)
Feature Description
Manual Pin Toggle Manually control the GPIO output level. API functions set the output pin levels and read the input
pin levels.
Monitor WakeUp Baseband Interrupt signal to wake the baseband processor/DSP when it is in the sleep state.
Processor/DSP
Rx AGC Overload Indicator Allows output of the AGC overload signals.
TX DCLK OUT Allows output of the SSI reference clock for the baseband processor to generate the TX SSI
clock, data, and strobe to the ADRV9001.
Control Out Mux
Control out mux (monitor out) allows status signals within the ADRV9001 to be output to digital GPIOs, such as the AGC mode of the gain
change flag, gain index can be mapped to the DGPIO for BBIC observation by the API adi_adrv9001_Rx_GainIndex_Gpio_Configure().
Map the ADRV9001 internal stream status to the DGPIO for the accurate transmitter/receiver enable control effective timing measurement. Call
adi_adrv9001_Stream_Gpio_Debug_Set() to enable this feature. Configure DGPIO0~3 to represent the Tx/Rx enable control effective timing.
See Pin Control Mode Timing Measurement
Manual Pin Toggle
The manual pin toggle feature controls the logic level of individual digital GPIO pins. adi_adrv9001_gpio_ManualOutput_Configure()
configures the relative GPIO to the manual control mode. The adi_adrv9001_gpio_OutputPinLevel_Set() command sets the output levels of
the GPIO pins. adi_adrv9001_gpio_OutputPinLevel_Get() command reads the output levels of the GPIO pins.
Additionally, the adi_adrv9001_gpio_InputPinLevel_Get() command reads the input GPIO level if the relative GPIO is configured as the input
by the adi_adrv9001_gpio_ManualInput_Configure() command.
Receiver AGC Overload Indicator
Retrieve the status of peak and power detectors in the receiver channel to the baseband processor through a set of DGPIO pins. One DGPIO
configuration uses the peak detect mode, which has the overrange and underrange conditions of both the analog peak detector (APD) and half
band (HB) detectors. The other DGPIO configuration uses the peak/power detect mode, which has the overrange and underrange conditions of
the APD and power detector.
The data structure of adi_adrv9001_GainControlCfg_t, and its substructures, adi_adrv9001_PeakDetector_t and adi_adrv9001_PowerDe-
tector_t initialize the necessary gain control parameters as well as the digital GPIO pins assignment for the overload indicator. The API
command adi_adrv9001_Rx_GainControl_Configure() sets the parameters. (See the
Monitor Wake-Up Baseband Processor/DSP
Assign certain digital GPIO pin as "wake-up baseband processor/DSP" to output the interrupt signal to wake the baseband processor/DSP
when the ADRV9001 works in the monitor mode and specific detection conditions are met.
Use the enum "ADI_ADRV9001_GPIO_SIGNAL_MON_BBIC_WAKEUP" as the DPGIO for the monitor wake-up interrupt signal. Call the API
adi_adrv9001_gpio_Configure() to enable this function.
TX DCLK OUT
This mode configures the DGPIO pins to a pair of differential or a single-ended reference clock for the baseband processor if the TX SSI and
RX SSI run at the different lane rate. Use this reference clock to generate the TX LSSI clock, data, and strobe when the RX SSI and TX
SSI run at the different clock rate. Assign DGPIO_12 and DGPIO_13 to the TX1_DCLK_OUT± functionality when it is in the LVDS mode, or
use either of DGPIO_12 or DGPIO_13 as the Tx1 DCLK out if it is in the CMOS mode. Similarly, assign DGPIO_14 and DGPIO_15 to the
analog.com
for more details.
GPIO Pins Available for Feature
DGPIO_0 through DGPIO_11
DGPIO_0 through DGPIO_11
DGPIO_0 through DGPIO_11
DGPIO_12 through DGPIO_13
TX Channel 1 SSI reference clock out pin
select
DGPIO_14 through DGPIO_15
TX Channel 2 SSI reference clock out pin
select
Receiver Gain Control section for more details.)
ADRV9001
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