System Architecture - Analog Devices Lite ADSP-21371 EZ-KIT System Manual

System Architecture

System Architecture
2-2
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This section describes the processor's configuration on the EZ-KIT Lite
board (Figure 2-1).
JTAG
Header
16.384 MHz
Oscillator
Reset PB
DPI
Conn
RS
232 ADM3202
Conn
A5V 3.3V 1.2V
4
Power Regulation
LEDs
SPI FLASH
(5)
Figure 2-1. System Architecture Block Diagram
The EZ-KIT Lite is designed to demonstrate the ADSP-21371 processor
capabilities. The processor core is powered at 1.2V, and the I/O is pow-
ered at 3.3V.
ADSP-21371 EZ-KIT Lite Evaluation System Manual
4M x 32
SDRAM
Parallel
Port
ADSP-21371
DSP
FLAGs
DPI DAI
0,1, and 3
AD1835
CODEC
2 2
Stereo In RCA
PBs (4)
Jacks (2x1)
1M x 8
Flash
Expansion
Connectors
Type A
DAI
Conn
ELVIS
Conn
Stereo Out RCA Headphone
Jacks (4x2) Jack