Rf Pll Loop Filter Recommendations; Pll Phase Noise - Analog Devices ADRV9001 User Manual

Reference Manual
SYNTHESIZER CONFIGURATION AND LO OPERATION
Single-ended external LO in is also supported. The matched single-ended impedance is 50 Ω. On-chip duty cycle correction circuit can correct
limited range of external LO duty cycle error if it is not 50%.
Enable external LO with the 1× divider for the carrier frequency range from 500 MHz to 1 GHz.
Single-Ended vs. Differential External LO
Note that the ADRV9001 evaluation board only supports differential external LO. However, there is no restriction to use single-ended LO in the
end system. Change clocks.ext1LoType and clocks.ext2LoType from 0 to 1. The following Enum contains this.
enum adi_adrv9001_ExtLoType {
ADI_ADRV9001_EXT_LO_DIFFERENTIAL = 0,
ADI_ADRV9001_EXT_LO_SINGLE_ENDED = 1}
Figure 97 shows the RF LO generation diagram.

RF PLL LOOP FILTER RECOMMENDATIONS

For optimal phase noise and error vector magnitude (EVM) performance, the ADRV9001 firmware has a look-up table of RF PLL loop filter
bandwidth settings. The ADRV9001 automatically selects the best RF PLL loop filter configuration based on the LO frequency, DEV_CLK
frequency, and PLL bandwidth. Alternatively, program own RF PLL loop filter bandwidth by following the instructions in the
Configuration section.

PLL PHASE NOISE

Figure 98 shows the typical PLL phase noise contributors. For low offset frequencies, the reference clock dominates the phase noise, and for
high offset frequencies, the VCO noise dominates the phase noise. Optimize the phase noise by:
Providing better reference clock source.
►
Providing higher reference clock frequency (PFD).
►
Adjusting the loop filter bandwidth to trade-off between the close-in band and far-out band noise.
►
When changing the loop filter bandwidth, the typical consideration is the wider the bandwidth, the better the close-in band noise, but the worse
the far-out band noise. Trade off between the two to find the optimal setting for the specific application. Note the highest phase frequency
detector (PFD) frequency the ADRV9001 supports is 307.2MHz.
analog.com
Figure 97. RF LO Generation Diagram
Figure 98. PLL Phase Noise Contributors
ADRV9001
Loop Filter
Rev. 0 | 106 of 351