Primary Display Color Matrix Transform Registers - AMD M56 Reference Manual

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2.7.6

Primary Display Color Matrix Transform Registers

D1GRPH_COLOR_MATRIX_TRANSFORMATION_CNTL - RW - 32 bits - DISPDEC:0x6380
Field Name
D1GRPH_COLOR_MATRIX_TRANSFORMATIO
N_EN
Matrix transformation control for primary display graphics and cursor pixel.
D1OVL_COLOR_MATRIX_TRANSFORMATION_CNTL - RW - 32 bits - DISPDEC:0x6140
Field Name
D1OVL_COLOR_MATRIX_TRANSFORMATION
_CNTL
Matrix transformation control for primary display overlay pixels.
Field Name
D1COLOR_MATRIX_COEF_1_1
D1COLOR_MATRIX_SIGN_1_1
Combined matrix constant C11 of RGB->YCbCr, contrast and brightness adjustment for primary display.
Field Name
D1COLOR_MATRIX_COEF_1_2
D1COLOR_MATRIX_SIGN_1_2
Combined matrix constant C12 of RGB->YCbCr, contrast and brightness adjustment for primary display.
© 2007 Advanced Micro Devices, Inc.
Proprietary
Bits
0
Bits
2:0
D1COLOR_MATRIX_COEF_1_1 - RW - 32 bits - DISPDEC:0x6384
Bits
16:0
31
D1COLOR_MATRIX_COEF_1_2 - RW - 32 bits - DISPDEC:0x6388
Bits
15:0
31
Default
0x0
Matrix transformation control for primary display graphics and cursor
pixel. It is used when PIX_TYPE is 1.
0=disable
1=enable
Default
0x0
Matrix transformation control for primary display overlay pixels. It is
used when PIX_TYPE is 0.
0=No color space adjustment on display output of overlay pixels
1=Apply display x color space control on the overlay pixels based
on DxCOLOR_MATRIX_COEF register settings
2=Convert overlay pixel to standard definition YCbCr(601) color
space
3=Convert overlay pixels to high definition YCbCR(709) color space
4=Convert overlay pixels to high definition TVRGB color space
Default
0x0
Combined matrix constant C11 of RGB->YCbCr, contrast and bright-
ness adjustment for primary display. Format fix-point S1.11(-2.00 to
+1.99).
NOTE: Bits 0:4 of this field are hardwired to ZERO.
0x0
Sign bit of combined matrix constant
Default
0x0
Combined matrix constant C12 of RGB->YCbCr, contrast and bright-
ness adjustment for primary display. Format fix-point S0.11(-1.00 to +
0.99).
NOTE: Bits 0:4 of this field are hardwired to ZERO.
0x0
Sign bit of combined matrix constant
Display Controller Registers
Description
Description
Description
Description
M56 Register Reference Manual
2-217

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