AMD M56 Reference Manual page 23

USE_CAL_STR
LOAD_STR
Channel 0's command pad control parameters.
Field Name
NMOS_PD
PSTR_OFF
NSTR_OFF
USE_CAL_STR
LOAD_STR
Channel 1's command pad control parameters.
Field Name
NMOS_PD
PSTR_OFF
NSTR_OFF
USE_CAL_STR
LOAD_STR
Channel 0's data pad control parameters.
Field Name
NMOS_PD
PSTR_OFF
NSTR_OFF
USE_CAL_STR
LOAD_STR
Channel 1's data pad control parameters.
Field Name
NMOS_PD
PSTR_OFF
NSTR_OFF
© 2007 Advanced Micro Devices, Inc.
Proprietary
12 0x0
13 0x0
MC_SEQ_CMD_PAD_CNTL_I1 - RW - 32 bits - MCIND:0x6F
Bits Default
1:0 0x0
7:4 0x0
11:8 0x0
12 0x0
13 0x0
MC_SEQ_DQ_PAD_CNTL_I0 - RW - 32 bits - MCIND:0x70
Bits Default
1:0 0x0
7:4 0x0
11:8 0x0
12 0x0
13 0x0
MC_SEQ_DQ_PAD_CNTL_I1 - RW - 32 bits - MCIND:0x71
Bits Default
1:0 0x0
7:4 0x0
11:8 0x0
12 0x0
13 0x0
MC_SEQ_QS_PAD_CNTL_I0 - RW - 32 bits - MCIND:0x72
Bits Default
1:0 0x0
7:4 0x0
11:8 0x0
If set, combines auto-calibration strength with programmed offset.
Otherwise, use programmed drive strength directly.
0=Ignore cal ctl str
1=Use cal ctl str
Loads drive strength explicitly.
Description
NMOS pulldown value.
P drive strength/offset.
N drive strength/offset.
If set, combines auto-calibration strength with programmed offset.
Otherwise, use programmed drive strength directly.
0=Ignore cal ctl str
1=Use cal ctl str
Loads drive strength explicitly.
Description
NMOS pulldown value.
P drive strength/offset.
N drive strength/offset.
If set, combines auto-calibration strength with programmed offset.
Otherwise, use programmed drive strength directly.
0=Ignore cal ctl str
1=Use cal ctl str
Loads drive strength explicitly.
Description
NMOS pulldown value.
P drive strength/offset.
N drive strength/offset.
If set, combines auto-calibration strength with programmed offset.
Otherwise, use programmed drive strength directly.
0=Ignore cal ctl str
1=Use cal ctl str
Loads drive strength explicitly.
Description
NMOS pulldown value.
P drive strength/offset.
N drive strength/offset.
M56 Register Reference Manual
Memory Controller Registers
2-17