AMD M56 Reference Manual page 119

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Field Name
PRBS23_FREERUN0
PRBS23_FREERUN1
PRBS23_FREERUN2
PRBS23_FREERUN3
PRBS23_FREERUN4
PRBS23_FREERUN5
PRBS23_FREERUN6
PRBS23_FREERUN7
PRBS23_FREERUN8
PRBS23_FREERUN9
PRBS23_FREERUN10
PRBS23_FREERUN11
PRBS23_FREERUN12
PRBS23_FREERUN13
PRBS23_FREERUN14
PRBS23_FREERUN15
PRBS23_LOCKED0 (R)
PRBS23_LOCKED1 (R)
PRBS23_LOCKED2 (R)
PRBS23_LOCKED3 (R)
PRBS23_LOCKED4 (R)
PRBS23_LOCKED5 (R)
PRBS23_LOCKED6 (R)
PRBS23_LOCKED7 (R)
PRBS23_LOCKED8 (R)
PRBS23_LOCKED9 (R)
PRBS23_LOCKED10 (R)
PRBS23_LOCKED11 (R)
PRBS23_LOCKED12 (R)
PRBS23_LOCKED13 (R)
PRBS23_LOCKED14 (R)
PRBS23_LOCKED15 (R)
PRBS23 registers for testing the PHY
Field Name
PRBS23_EN
PRBS10_EN
PRBS23_LOCKCNT
PRBS enable registers for testing the PHY
Field Name
VGA_DIS (R)
Reserved
SLV_ADR64_EN (R)
© 2007 Advanced Micro Devices, Inc.
Proprietary
PCIE_PRBS23_CTRL1 - RW - 32 bits - PCIEIND:0x423
Bits
Default
0
0x0
1
0x0
2
0x0
3
0x0
4
0x0
5
0x0
6
0x0
7
0x0
8
0x0
9
0x0
10
0x0
11
0x0
12
0x0
13
0x0
14
0x0
15
0x0
16
0x0
17
0x0
18
0x0
19
0x0
20
0x0
21
0x0
22
0x0
23
0x0
24
0x0
25
0x0
26
0x0
27
0x0
28
0x0
29
0x0
30
0x0
31
0x0
PCIE_PRBS_EN - RW - 32 bits - PCIEIND:0x424
Bits
Default
0
0x0
16:1
0x0
21:17
0xf
PCIE_XSTRAP1 - RW - 32 bits - PCIEIND:0x425
Bits
Default
0
0x0
1:2
0x0
3
0x0
Description
PRBS23 checker enable freerun for Lane 0
PRBS23 checker enable freerun for Lane 1
PRBS23 checker enable freerun for Lane 2
PRBS23 checker enable freerun for Lane 3
PRBS23 checker enable freerun for Lane 4
PRBS23 checker enable freerun for Lane 5
PRBS23 checker enable freerun for Lane 6
PRBS23 checker enable freerun for Lane 7
PRBS23 checker enable freerun for Lane 8
PRBS23 checker enable freerun for Lane 9
PRBS23 checker enable freerun for Lane 10
PRBS23 checker enable freerun for Lane 11
PRBS23 checker enable freerun for Lane 12
PRBS23 checker enable freerun for Lane 13
PRBS23 checker enable freerun for Lane 14
PRBS23 checker enable freerun for Lane 15
PRBS23 checker is locked for Lane 0
PRBS23 checker is locked for Lane 1
PRBS23 checker is locked for Lane 2
PRBS23 checker is locked for Lane 3
PRBS23 checker is locked for Lane 4
PRBS23 checker is locked for Lane 5
PRBS23 checker is locked for Lane 6
PRBS23 checker is locked for Lane 7
PRBS23 checker is locked for Lane 8
PRBS23 checker is locked for Lane 9
PRBS23 checker is locked for Lane 10
PRBS23 checker is locked for Lane 11
PRBS23 checker is locked for Lane 12
PRBS23 checker is locked for Lane 13
PRBS23 checker is locked for Lane 14
PRBS23 checker is locked for Lane 15
Description
PRBS23 generator is enabled for all 16 lanes
PRBS10 generator is enabled for Lanes 15 down to 0
PRBS23 checker number of locked bits to sync
Description
Enable VGS controller capacity
0=VGA controller capacity enabled
1=the device will not be recognized as the system's VGA controller
Slave DAC Decode. Decode dual address slave cycle and using
64-bit bar
M56 Register Reference Manual
PCIE Registers
2-113

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