AMD M56 Reference Manual page 244

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Display Controller Registers
Field Name
D2OVL_Y_END
D2OVL_X_END
Secondary overlay X, Y end coordinate relative to the desktop coordinates.
Field Name
D2OVL_UPDATE_PENDING (R)
D2OVL_UPDATE_TAKEN (R)
D2OVL_UPDATE_LOCK
Secondary overlay register update
Field Name
D2OVL_SURFACE_ADDRESS_INUSE (R)
Snapshot of secondary overlay surface address in use
M56 Register Reference Manual
2-238
D2OVL_END - RW - 32 bits - DISPDEC:0x69A8
Bits
13:0
29:16
D2OVL_UPDATE - RW - 32 bits - DISPDEC:0x69AC
Bits
0
1
16
D2OVL_SURFACE_ADDRESS_INUSE - RW - 32 bits - DISPDEC:0x69B0
Bits
31:11
Default
0x0
Secondary overlay Y end coordinate relative to the desktop coordi-
nates. It is exclusive and the maximum value is 8K
0x0
Secondary overlay X end coordinate relative to the desktop coordi-
nates. It is exclusive and the maximum value is 8K
Default
0x0
Secondary overlay register update pending control. It is set to 1 after
a host write to overlay double buffer register. It is cleared after double
buffering is done. The double buffering occurs when
UPDATE_PENDING = 1 and UPDATE_LOCK = 0 and V_UPDATE =
1.
If CRTC2 is disabled, the registers will be updated instantly.
D2OVL double buffer registers include:
D2OVL_ENABLE
D2OVL_DEPTH
D2OVL_FORMAT
D2OVL_SWAP_RB
D2OVL_COLOR_EXPANSION_MODE
D2OVL_HALF_RESOLUTION_ENABLE
D2OVL_SURFACE_ADDRESS
D2OVL_PITCH
D2OVL_SURFACE_OFFSET_X
D2OVL_SURFACE_OFFSET_Y
D2OVL_START
D2OVL_END
0=No update pending
1=Update pending
0x0
Secondary overlay update taken status. It is set to 1 when double
buffering occurs and cleared when V_UPDATE = 0.
0x0
Secondary overlay register update lock control.
0=Unlocked
1=Locked
Default
0x0
This register reads back snapshot of secondary overlay surface
address used for data request. The address is the signal sent to
DMIF and is updated on SOF or horizontal surface update. The snap-
shot is triggered by writing 1 into field
D1CRTC_SNAPSHOT_MANUAL_TRIGGER of CRTC register
D1CRTC_SNAPSHOT_STATUS.
Description
Description
Description
© 2007 Advanced Micro Devices, Inc.
Proprietary

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