AMD M56 Reference Manual page 297

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D2CRTC_FORCE_VSYNC_NEXT_LINE_CLEAR
(W)
D2CRTC_AUTO_FORCE_VSYNC_MODE
Controls the feature to force VSYNC next line for CRTC2
Field Name
D2CRTC_STEREO_CURRENT_EYE (R)
D2CRTC_STEREO_SYNC_OUTPUT (R)
D2CRTC_STEREO_SYNC_SELECT (R)
D2CRTC_STEREO_FORCE_NEXT_EYE_PEND
ING (R)
Reports CRTC2 status in stereoscopic display
Field Name
D2CRTC_STEREO_SYNC_OUTPUT_POLARIT
Y
D2CRTC_STEREO_SYNC_SELECT_POLARITY
D2CRTC_STEREO_EN
Stereosync control for CRTC2
Field Name
D2CRTC_SNAPSHOT_OCCURRED (R)
D2CRTC_SNAPSHOT_CLEAR (W)
D2CRTC_SNAPSHOT_MANUAL_TRIGGER (W)
Controls CRTC2 snapshot
© 2007 Advanced Micro Devices, Inc.
Proprietary
8
17:16
D2CRTC_STEREO_STATUS - RW - 32 bits - DISPDEC:0x68C0
Bits
0
8
16
25:24
D2CRTC_STEREO_CONTROL - RW - 32 bits - DISPDEC:0x68C4
Bits
8
16
24
D2CRTC_SNAPSHOT_STATUS - RW - 32 bits - DISPDEC:0x68C8
Bits
0
1
2
0x0
One shot clear to the sticky bit
D1CRTC_FORCE_VSYNC_NEXT_LINE_OCCURRED when writ-
ten with '1'
0x0
Selection of auto mode for forcing vsync next line
00 = disables auto mode
01 = force VSYNC next line on CRTC trigger A signal
10 = force VSYNC next line on CRTC trigger B signal
11 = reserved
Default
0x0
Reports the polarity of the current frame/field
0 = right eye image
1 = left eye image
0x0
Reports current value of STEREOSYNC signal
0x0
Reports current value of SYNC_SELECT signal
0x0
Reports the status of D2CRTC_STEREO_FORCE_NEXT_EYE
write.
00: No force pending
01: Right force pending
10: Left force pending
11: Reserved
Default
0x0
Controls polarity of the stereosync signal
0 = 0 means right eye image and 1 means left eye image
1 = 0 means left eye image and 1 means right eye image
0x0
Controls polarity of STEREO_SELECT signal sent to scaler
0 = 0 means right eye image and 1 means left eye image
1 = 0 means left eye image and 1 means right eye image
0x0
Enables toggling of STEREOSYNC and STEREO_SELECT signals
0 = disable toggling.
1 = enable toggling at every frame (progressive) or every field (inter-
lace) at leading edge of VSYNCA
Default
0x0
Reports status of snapshot. A sticky bit to be cleared by writing 1 to
D2CRTC_SNAPSHOT_CLEAR
0 = snapshot has not occurred
1 = snapshot has occurred
0x0
Clears the D2CRTC_SNAPSHOT_OCCURRED sticky bit when writ-
ten with '1'
0x0
One shot trigger to perform snapshot when written with '1'
CRTC Registers
Description
Description
Description
M56 Register Reference Manual
2-291

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