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Field Name
D1CRTC_V_SYNC_A_START
D1CRTC_V_SYNC_A_END
Defines the position of vertical sync A for CRTC1
Field Name
D1CRTC_V_SYNC_A_POL
Controls V SYNC A for CRTC1
Field Name
D1CRTC_V_SYNC_B_START
D1CRTC_V_SYNC_B_END
Defines the position of vertical sync B for CRTC1
Field Name
D1CRTC_V_SYNC_B_POL
Controls vertical sync B for CRTC1
© 2007 Advanced Micro Devices, Inc.
Proprietary
D1CRTC_V_SYNC_A - RW - 32 bits - DISPDEC:0x6028
Bits
Default
12:0
28:16
D1CRTC_V_SYNC_A_CNTL - RW - 32 bits - DISPDEC:0x602C
Bits
Default
0
D1CRTC_V_SYNC_B - RW - 32 bits - DISPDEC:0x6030
Bits
Default
12:0
28:16
D1CRTC_V_SYNC_B_CNTL - RW - 32 bits - DISPDEC:0x6034
Bits
Default
0
0x0
The first line of vertical sync A. In normal cases, it is set to 0. It is set
to non-zero value only when trying to test the higher bits of the verti-
cal counter
0x0
Vertical sync A end. Determines the position of the next line after the
last line of vertical sync A. The last line of vertical sync A is
D1CRTC_V_SYNC_A_END - 1. The first line of vertical sync A is line
0. This register value is exclusive. It should be programmed to a
value one greater than the actual last line of vertical sync A
Double-buffered with D1MODE_MASTER_UPDATE_LOCK
0x0
Polarity of V SYNC A
0 = active high
1 = active low
Double-buffered with D1MODE_MASTER_UPDATE_LOCK
0x0
Vertical sync B start. Determines the position of the first line of verti-
cal sync B.
0x0
Vertical sync B end. Determines the position of the next line after the
last line of vertical sync B. Last line of vertical sync B is
D1CRTC_V_SYNC_B_END - 1. This register value is exclusive. It
should be programmed to a value one greater than the actual last line
of vertical sync B
0x0
Controls polarity of vertical sync B
0 = active high
1 = active low
CRTC Registers
Description
Description
Description
Description
M56 Register Reference Manual
2-269
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