AMD M56 Reference Manual page 107

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P_INSERT_ERROR_4
P_INSERT_ERROR_5
P_INSERT_ERROR_6
P_INSERT_ERROR_7
P_INSERT_ERROR_8
P_INSERT_ERROR_9
P_INSERT_ERROR_10
P_INSERT_ERROR_11
P_INSERT_ERROR_12
P_INSERT_ERROR_13
P_INSERT_ERROR_14
P_INSERT_ERROR_15
Field Name
P_TX_STR_CNTL_READ_BACK (R)
P_TX_IMP_CNTL_READ_BACK (R)
P_RX_IMP_CNTL_READ_BACK (R)
P_TX_STR_CNTL
P_TX_IMP_CNTL
P_RX_IMP_CNTL
P_PAD_MANUAL_OVERRIDE
PHY IMPEDANCE CONTROL STRENGTH REGISTER
Field Name
P_IMP_PAD_UPDATE_RATE
P_IMP_PAD_SAMPLE_DELAY
P_IMP_PAD_INC_THRESHOLD
© 2007 Advanced Micro Devices, Inc.
Proprietary
20
21
22
23
24
25
26
27
28
29
30
31
PCIE_P_IMP_CNTL_STRENGTH - RW - 32 bits - PCIEIND:0xC0
Bits
Default
3:0
7:4
11:8
19:16
23:20
27:24
31
PCIE_P_IMP_CNTL_UPDATE - RW - 32 bits - PCIEIND:0xC1
Bits
Default
4:0
12:8
20:16
0x0
0=Normal Operation
1=Inserting error on Transmitting Lane4 by replacing one symbol
with an invalid symbol
0x0
0=Normal Operation
1=Inserting error on Transmitting Lane5 by replacing one symbol
with an invalid symbol
0x0
0=Normal Operation
1=Inserting error on Transmitting Lane6 by replacing one symbol
with an invalid symbol
0x0
0=Normal Operation
1=Inserting error on Transmitting Lane7 by replacing one symbol
with an invalid symbol
0x0
0=Normal Operation
1=Inserting error on Transmitting Lane8 by replacing one symbol
with an invalid symbol
0x0
0=Normal Operation
1=Inserting error on Transmitting Lane9 by replacing one symbol
with an invalid symbol
0x0
0=Normal Operation
1=Inserting error on Transmitting Lane10 by replacing one symbol
with an invalid symbol
0x0
0=Normal Operation
1=Inserting error on Transmitting Lane11 by replacing one symbol
with an invalid symbol
0x0
0=Normal Operation
1=Inserting error on Transmitting Lane12 by replacing one symbol
with an invalid symbol
0x0
0=Normal Operation
1=Inserting error on Transmitting Lane13 by replacing one symbol
with an invalid symbol
0x0
0=Normal Operation
1=Inserting error on Transmitting Lane14 by replacing one symbol
with an invalid symbol
0x0
0=Normal Operation
1=Inserting error on Transmitting Lane15 by replacing one symbol
with an invalid symbol
0x0
Store the readback value of current controller
0x0
Store the readback value of TX impedance controller
0x0
Store the readback value of RX impedance controller
0x7
Set the initial default current strength to 4'b0111
0x7
Default TX impedance control value
0x7
Default RX impedance control value
0x0
0=Allow normal impedance compensation operation
1=Default to manual settings
0xf
PAD's update interval
0x1
Sampling window
0x18
Incremental resolution
Bus Interface Registers
Description
Description
M56 Register Reference Manual
2-101

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