AMD M56 Reference Manual page 158

VIP/I2C Registers
VIPPAD_Y_VPCLK0
VIPPAD_Y_DVALID
VIPPAD_Y_PSYNC
Additional GPIO Interface Input Readback
Field Name
PWM_INC
PWM_CLK_DIV
PWM_OUT_EN
M56 Register Reference Manual
2-152
16 0x0 Input readback of GPIO[24].
17 0x0 Input readback of GPIO[26].
18 0x0 Input readback of GPIO[25].
MAXX_PWM - RW - 32 bits - VIPDEC:0xC64
Bits Default
7:0 0x0 PWM increment
11:8 0x0 PWM clock divider
16 0x0
drives out PWM signal.
0=This pin was low at time of read.
1=This pin was high at time of read.
0=This pin was low at time of read.
1=This pin was high at time of read.
0=This pin was low at time of read.
1=This pin was high at time of read.
Description
0=PWM output disabled.
1=PWM output enabled. PSYNC pin becomes output enabled and
© 2007 Advanced Micro Devices, Inc.
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