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Display Output Registers
Field Name
DACA_CRC_SIG_CONTROL_MASK
Mask bits for DACA control signal CRC
Field Name
DACA_CRC_SIG_BLUE (R)
DACA_CRC_SIG_GREEN (R)
DACA_CRC_SIG_RED (R)
DACA CRC R, G & B results
Field Name
DACA_CRC_SIG_CONTROL (R)
CRC signature value for DACA control signals
Field Name
DACA_HSYNCA_TRISTATE
DACA_VSYNCA_TRISTATE
DACA_SYNCA_TRISTATE
DACA SYNC Tristate control
Field Name
DACA_SYNC_SELECT
DACA_STEREOSYNC_SELECT
DACA ...SYNC selection
M56 Register Reference Manual
2-296
DACA_CRC_SIG_CONTROL_MASK - RW - 32 bits - DISPDEC:0x7814
Bits
5:0
DACA_CRC_SIG_RGB - RW - 32 bits - DISPDEC:0x7818
Bits
9:0
19:10
29:20
DACA_CRC_SIG_CONTROL - RW - 32 bits - DISPDEC:0x781C
Bits
5:0
DACA_SYNC_TRISTATE_CONTROL - RW - 32 bits - DISPDEC:0x7820
Bits
0
8
16
DACA_SYNC_SELECT - RW - 32 bits - DISPDEC:0x7824
Bits
0
8
Default
0x3f
Mask bits for DACA control signal CRC
Default
0x3ff
CRC signature value for DACA blue component
0x3ff
CRC signature value for DACA green component
0x3ff
CRC signature value for DACA red component
Default
0x3f
CRC signature value for DACA control signals
Default
0x0
DACA hsync tristate. Used to determine hsynca enable
0x0
DACA vsync tristate. Used to determine vsynca enable
0x0
DACA sync tristate. Used to determine sync enables
Default
0x0
0: selects sync_a
1: selects sync_b.
Used in conjunction with DACA_SOURCE_SEL(0).
0=DACA uses HSYNC_A & VSYNC_A
1=DACA used HSYNC_B & VSYNC_B
0x0
0: selects crtc1 stereosync
1: selects crtc2 stereosync
0=DACA uses CRTC1 STEREOSYNC
1=DACA uses CRTC2 STEREOSYNC
Description
Description
Description
Description
Description
© 2007 Advanced Micro Devices, Inc.
Proprietary
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