AMD M56 Reference Manual page 374

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Table A-5 Display Registers Sorted by Name
D1OVL_SURFACE_OFFSET_Y
D2COLOR_MATRIX_COEF_1_1
D2COLOR_MATRIX_COEF_1_2
D2COLOR_MATRIX_COEF_1_3
D2COLOR_MATRIX_COEF_1_4
D2COLOR_MATRIX_COEF_2_1
D2COLOR_MATRIX_COEF_2_2
D2COLOR_MATRIX_COEF_2_3
D2COLOR_MATRIX_COEF_2_4
D2COLOR_MATRIX_COEF_3_1
D2COLOR_MATRIX_COEF_3_2
D2COLOR_MATRIX_COEF_3_3
D2COLOR_MATRIX_COEF_3_4
D2COLOR_SPACE_CONVERT
D2CRTC_BLANK_CONTROL
D2CRTC_BLANK_DATA_COLOR
D2CRTC_COUNT_CONTROL
D2CRTC_DOUBLE_BUFFER_CONTROL
D2CRTC_FLOW_CONTROL
D2CRTC_FORCE_COUNT_NOW_CNTL
D2CRTC_H_BLANK_START_END
D2CRTC_H_SYNC_A_CNTL
D2CRTC_H_SYNC_B_CNTL
D2CRTC_INTERLACE_CONTROL
D2CRTC_INTERLACE_STATUS
D2CRTC_INTERRUPT_CONTROL
D2CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE
D2CRTC_OVERSCAN_COLOR
D2CRTC_PIXEL_DATA_READBACK
D2CRTC_SNAPSHOT_CONTROL
D2CRTC_SNAPSHOT_FRAME
D2CRTC_SNAPSHOT_POSITION
M56 Register Reference Manual
A-14
Register Name
D1OVL_UPDATE
D1VGA_CONTROL
D2CRTC_BLACK_COLOR
D2CRTC_CONTROL
D2CRTC_COUNT_RESET
D2CRTC_H_SYNC_A
D2CRTC_H_SYNC_B
D2CRTC_H_TOTAL
(Continued)
Address
DISPDEC:0x61A0
DISPDEC:0x61AC
DISPDEC:0x330
DISPDEC:0x6B84
DISPDEC:0x6B88
DISPDEC:0x6B8C
DISPDEC:0x6B90
DISPDEC:0x6B94
DISPDEC:0x6B98
DISPDEC:0x6B9C
DISPDEC:0x6BA0
DISPDEC:0x6BA4
DISPDEC:0x6BA8
DISPDEC:0x6BAC
DISPDEC:0x6BB0
DISPDEC:0x693C
DISPDEC:0x6898
DISPDEC:0x6884
DISPDEC:0x6890
DISPDEC:0x6880
DISPDEC:0x68B4
DISPDEC:0x68B0
DISPDEC:0x68EC
DISPDEC:0x6874
DISPDEC:0x6870
DISPDEC:0x6804
DISPDEC:0x6808
DISPDEC:0x680C
DISPDEC:0x6810
DISPDEC:0x6814
DISPDEC:0x6800
DISPDEC:0x6888
DISPDEC:0x688C
DISPDEC:0x68DC
DISPDEC:0x68B8
DISPDEC:0x6894
DISPDEC:0x6878
DISPDEC:0x68CC
DISPDEC:0x68D4
DISPDEC:0x68D0
© 2007 Advanced Micro Devices, Inc.
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