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VIP/I2C Registers
Field Name
VIPH_DV0_INT_EN
VIPH_DV1_INT_EN
VIPH_DV2_INT_EN
VIPH_DV3_INT_EN
VIPH_DV0_INT (R)
VIPH_DV0_AK (W)
VIPH_DV1_INT (R)
VIPH_DV1_AK (W)
VIPH_DV2_INT (R)
VIPH_DV2_AK (W)
VIPH_DV3_INT (R)
VIPH_DV3_AK (W)
VIP Host port interrupt control
Field Name
VIPH_FIFO0_STAT (R)
VIPH_FIFO0_AK (W)
VIPH_FIFO1_STAT (R)
VIPH_FIFO1_AK (W)
VIPH_FIFO2_STAT (R)
VIPH_FIFO2_AK (W)
VIPH_FIFO3_STAT (R)
VIPH_FIFO3_AK (W)
VIPH_REG_STAT (R)
VIPH_REG_AK (W)
VIPH_AUTO_INT_STAT (R)
VIPH_AUTO_INT_AK (W)
VIPH_FIFO0_MASK
VIPH_FIFO1_MASK
VIPH_FIFO2_MASK
VIPH_FIFO3_MASK
VIPH_REG_MASK
VIPH_AUTO_INT_MASK
VIPH_DV0_INT_MASK
VIPH_DV1_INT_MASK
VIPH_DV2_INT_MASK
VIPH_DV3_INT_MASK
VIPH_INTPIN_EN
VIPH_INTPIN_INT (R)
VIPH_REGR_DIS
VIP Host Port Time Out Status
M56 Register Reference Manual
2-124
VIPH_DV_INT - RW - 32 bits - VIPDEC:0xC4C
Bits
Default
0
0x0
1
0x0
2
0x0
3
0x0
4
0x0
4
0x0
5
0x0
5
0x0
6
0x0
6
0x0
7
0x0
7
0x0
VIPH_TIMEOUT_STAT - RW - 32 bits - VIPDEC:0xC50
Bits
Default
0
0x0
0
0x0
1
0x0
1
0x0
2
0x0
2
0x0
3
0x0
3
0x0
4
0x0
4
0x0
5
0x0
5
0x0
8
0x0
9
0x0
10
0x0
11
0x0
12
0x0
13
0x0
16
0x0
17
0x0
18
0x0
19
0x0
20
0x0
21
0x0
24
0x0
Description
Interrupt polling enable for VIP slave device 0
Interrupt polling enable for VIP slave device 1
Interrupt polling enable for VIP slave device 2
Interrupt polling enable for VIP slave device 3
Interrupt
Clear interrupt with a '1'
Interrupt
Clear interrupt with a '1'
Interrupt
Clear interrupt with a '1'
Interrupt
Clear interrupt with a '1'
Description
'1' if port 0 time out or hung.
Clear FIFO0_STAT with a '1'
'1' if port 1 time out or hung.
Clear FIFO1_STAT with a '1'
'1' if port 2 time out or hung.
Clear FIFO2_STAT with a '1'
'1' if port 3 time out or hung.
Clear FIFO3_STAT with a '1'
'1' if register port time out or hung.
Clear REG_STAT with a '1'
'1' if auto interrupt polling time out or hung.
Clear AUTO_INT_STAT with a '1'
'0' disable interrupt.
'0' disable interrupt.
'0' disable interrupt.
'0' disable interrupt.
'0' disable interrupt.
'0' disable interrupt.
'0' disable interrupt.
'0' disable interrupt.
'0' disable interrupt.
'0' disable interrupt.
'0' means no physical pins used for VIP interrupt. 1= physical pins
used.
'1' if physical pins has interrupt.
'0'= any host read from VIPH_REG_DATA will trigger VIP register
cycle. 1= Read from VIPH_REG_DATA will not trigger VIP register
cycle.
© 2007 Advanced Micro Devices, Inc.
Proprietary
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