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Field Name
CURSOR_LOC_LO
Cursor Location (Low Byte) Register
Field Name
V_SYNC_START
Start Vertical Retrace Register
Field Name
V_SYNC_END
V_INTR_CLR
V_INTR_EN
SEL5_REFRESH_CYC
C0T7_WR_ONLY
End Vertical Retrace Register
Field Name
V_DISP_END
Vertical Display Enable End Register
© 2007 Advanced Micro Devices, Inc.
Proprietary
CRT0F - RW - 8 bits - VGACRTIND:0xF
Bits
Default
7:0
0x0
CA bits 7:0- These are the eight low-order bits of the 16 bit cursor
start address. The high-order CA bits are contained in CRT0E. This
address is relative to the start of physical display memory address
pointed to by CRT0C + CRT0D. In other words, if CRT0C + T0D is
changed, the cursor still points to the same character as before
CRT10 - RW - 8 bits - VGACRTIND:0x10
Bits
Default
7:0
0x0
Bits CRT10[7:0] are the eight low-order bits of the 10-bit vertical
retrace start count. The two high-order bits are CRTt07[2:7], located
in the CRTC overflow register.- These bits define the horizontal scan
count that triggers the V retrace pulse.
CRT11 - RW - 8 bits - VGACRTIND:0x11
Bits
Default
3:0
0x0
V Retrace End Bits 3-0- Bits CRT11[0:3] define the horizontal scan
count that triggers the end of the V Retrace pulse.
4
0x0
V Retrace Interrupt Set:
0=VRetraceIntCleared
1=Not Cleared
5
0x0
V Retrace Interrupt Disabled:
0=VRetraceIntEna
1=Disable
6
0x0
0=3 DRAM Refresh/Horz Line
1=5 DRAM Refresh/Horz Line
7
0x0
Write Protect (CRT00-CRT06). All register bits except CRTO7[4] are
write protected.
0=EnaWrtToCRT00-07
1=C0T7B4WrtOnly
CRT12 - RW - 8 bits - VGACRTIND:0x12
Bits
Default
7:0
0x0
These are the eight low-order bits of the 10-bit register containing the
horizontal scan count indicating where the active display on the
screen should end. The high-order bits are CRT07 [1:6] in the CRT
overflow register.
VGA Registers
Description
Description
Description
Description
M56 Register Reference Manual
2-175
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