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VGA Registers
Field Name
VGA_DEBUG_READBACK_DATA (R)
VGA debug readback data register
Field Name
GENMO_MONO_ADDRESS_B
VGA_RAM_EN
VGA_CKSEL
ODD_EVEN_MD_PGSEL
VGA_HSYNC_POL
VGA_VSYNC_POL
Miscellaneous Output Register (Write)
M56 Register Reference Manual
2-194
VGA_DEBUG_READBACK_DATA - RW - 32 bits - DISPDEC:0x35C
Bits
31:0
GENMO_WT - W - 8 bits - DISPDEC:0x3C2
Bits
0
1
3:2
5
6
7
Default
0x0
According to the value of VGA_DEBUG_READBACK_INDEX,
VGA_DEBUG_READBACK_DATA will have this values:
0: VGAREG_DISP_h_total[10:0]
1: VGAREG_DISP_h_sync_end[10:0]
2: VGAREG_DISP_h_disp_start[10:0]
3: VGAREG_DISP_h_disp_width[10:0]
4: VGAREG_DISP_h_blank_start[10:0]
5: VGAREG_DISP_h_blank_end[10:0]
6: VGAREG_DISP_v_total[10:0]
7: VGAREG_DISP_v_sync_end[10:0]
8: VGAREG_DISP_v_disp_start[10:0]
9: VGAREG_DISP_v_disp_height[10:0]
10: VGAREG_DISP_v_blank_start[10:0]
11: VGAREG_DISP_v_blank_end[10:0]
12: VGAREG_DISP_overscan_colorR[5:0]
13: VGAREG_DISP_overscan_colorG[5:0]
14: VGAREG_DISP_overscan_colorB[5:0]
15: reserved
16 VGA_DISP_viewport_x_start
17 VGA_DISP_viewport_y_start
Default
0x0
VGA addressing mode.
0=Monochrome emulation, regs at 0x3Bx
1=Color/Graphic emulation, regs at 0x3Dx
0x0
Enables/Disables CPU access to video RAM at VGA aperture.
0=Disable
1=Enable
0x0
Selects pixel clock frequency to use in VGA modes. Used when
CRTC_GEN_CNTL.CRTC_EXT_DISP_EN=0. See
CLOCK_CNTL_INDEX.PPLL_DIV_SEL for non-VGA mode pixel
clock selection.
0=25.1744MHz (640 Pels)
1=28.3212MHz (720 Pels)
2=Reserved
3=Reserved
0x0
This bit is used in odd/even display modes (A/N modes: 0, 1, 2, 3,
and 7). This bit is ignored when either bit GRA06[1] or SEQ4[3] are
enabled.
Used to determine if the VGA aperture maps into the lower (even) or
upper (odd) page of memory.
0=Selects odd (high) memory locations
1=Selects even (low) memory locations
0x0
Determines polarity of horizontal sync (HSYNC) for VGA modes.
0 = HSYNC pulse active high
1 = HSYNC pulse active low
The convention of VGA is to use active low VSYNC for 400 (and 200)
and 480 line modes. Active high is normally used for 350 line modes.
0x0
Determines polarity of vertical sync (VSYNC) for VGA modes.
0 = VSYNC pulse active high
1 = VSYNC pulse active low
The convention of VGA is to use active high VSYNC for 400 (and
200) line modes. Active low is normally used for 350 and 480 line
modes.
Description
Description
© 2007 Advanced Micro Devices, Inc.
Proprietary
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