AMD M56 Reference Manual page 328

Display Output Registers
DC_HOT_PLUG_DETECT_CLOCK_CONTROL - RW - 32 bits - DISPDEC:0x7D20
Field Name
DC_HOT_PLUG_DETECT_CLOCK_ENABLE
DC_HOT_PLUG_DETECT_CLOCK_SEL
Field Name
DC_I2C_DONE
DC_I2C_NACK
DC_I2C_HALT
DC_I2C_GO
Field Name
DC_I2C_SOFT_RESET
DC_I2C_ABORT
Field Name
DC_I2C_START
DC_I2C_STOP
DC_I2C_RECEIVE
DC_I2C_EN
DC_I2C_PIN_SELECT
M56 Register Reference Manual
2-322
Bits Default
0 0x1
17:16 0x0
DC_I2C_STATUS1 - RW - 32 bits - DISPDEC:0x7D30
Bits Default
0 0x0
1 0x0
2 0x0
3 0x0
DC_I2C_RESET - RW - 32 bits - DISPDEC:0x7D34
Bits Default
0 0x0
8 0x0
DC_I2C_CONTROL1 - RW - 32 bits - DISPDEC:0x7D38
Bits Default
0 0x0
1 0x0
2 0x0
8 0x0
17:16 0x0
Description
Enable HPD clock
0=Disable
1=Enable
Select HPD reference frequency
0=1/8192 of crystal clock
1=1/512 of crystal clock
2=1/32 of crystal clock
3=1/2 of crystal clock
Description
DVI_I2C busy/transfer complete
0=I2c is busy
1=transfer is complete
I2C slave did not issue acknowledge
1=Slave did not issue acknowledge
Timeout condition. Transfer is halted
1=Time-out condition, transfer is halted
Write 1 to start I2C transfer
Description
Reset I2C controller
0=Normal
1=Resets i2c controller
Write 1 to abort I2C transfer
0=No abort
1=Abort
Description
Control whether a START is sent at the start of the transfer
0=No start
1=Start
Control whether a STOP is sent at the end of the transfer
0=No stop
1=Stop
Select whether master will send or receive data
0=Send
1=Receive
I2C pads drive SDA when 1
Select DDC pins to be used by DOUT I2C master
0=DOUT I2C Master uses DDC1_DATA and DDC1_CLK pins
1=DOUT I2C Master uses DDC2_DATA and DDC2_CLK pins
2=DOUT I2C Master uses DDC3_DATA and DDC3_CLK pins
3=Reserved
© 2007 Advanced Micro Devices, Inc.
Proprietary