AMD M56 Reference Manual page 441

Table A-18 All Registers Sorted by Name
DOUT_POWER_MANAGEMENT_CNTL
© 2007 Advanced Micro Devices, Inc.
Proprietary
Register Name
DISP_INTERRUPT_STATUS
DISP_TIMER_CONTROL
DLL_CNTL
DMA_VIP0_TABLE_ADDR
DMA_VIP1_TABLE_ADDR
DMA_VIP2_TABLE_ADDR
DMA_VIP3_TABLE_ADDR
DMA_VIPH_ABORT
DMA_VIPH_CHUNK_0
DMA_VIPH_CHUNK_1_VAL
DMA_VIPH_MISC_CNTL
DMA_VIPH_STATUS
DMA_VIPH0_ACTIVE
DMA_VIPH0_COMMAND
DMA_VIPH0_COMMAND
DMA_VIPH1_ACTIVE
DMA_VIPH1_COMMAND
DMA_VIPH2_ACTIVE
DMA_VIPH2_COMMAND
DMA_VIPH3_ACTIVE
DMA_VIPH3_COMMAND
DMIF_CONTROL
DMIF_STATUS
DO_PERFCOUNTER0_HI
DO_PERFCOUNTER0_LOW
DO_PERFCOUNTER0_SELECT
DO_PERFCOUNTER1_HI
DO_PERFCOUNTER1_LOW
DO_PERFCOUNTER1_SELECT
DVOA_BIT_DEPTH_CONTROL
DVOA_CONTROL
DVOA_CRC_CONTROL
DVOA_CRC_EN
DVOA_CRC_SIG_MASK1
DVOA_CRC_SIG_MASK2
DVOA_CRC_SIG_RESULT1
DVOA_CRC_SIG_RESULT2
DVOA_CRC2_SIG_MASK
DVOA_CRC2_SIG_RESULT
(Continued)
Page
2-335
2-337
2-162
2-140
2-140
2-140
2-141
2-142
2-139
2-140
2-149
2-139
2-141
2-137
2-144
2-141
2-137
2-141
2-138
2-141
2-138
2-264
2-264
2-338
2-338
2-338
2-338
2-338
2-338
2-336
2-317
2-318
2-318
2-318
2-319
2-319
2-319
2-319
2-319
2-319
M56 Register Reference Manual
A-81